| Alex Marginean | a7fdac7 | 2021-01-27 13:00:00 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR X11 |
| 2 | /* |
| 3 | * Device tree fragment for RCW SCH-30842 card |
| 4 | * |
| Vladimir Oltean | 66fd01f | 2021-09-17 14:27:13 +0300 | [diff] [blame] | 5 | * Copyright 2019-2021 NXP |
| Alex Marginean | a7fdac7 | 2021-01-27 13:00:00 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * SCH-30842 is a single port add-on card used with various FSL QDS boards. |
| 10 | * It integrates a AQR112 PHY, which supports several protocols - SGMII, |
| Vladimir Oltean | 7c2d5d1 | 2021-09-18 15:32:35 +0300 | [diff] [blame] | 11 | * 2500base-x, USXGMII, 10GBase-R. |
| Alex Marginean | a7fdac7 | 2021-01-27 13:00:00 +0200 | [diff] [blame] | 12 | * PHY address is 0x02. |
| 13 | */ |
| 14 | phy@02 { |
| 15 | reg = <0x02>; |
| 16 | mdi-reversal = <1>; |
| 17 | smb-addr = <0x25>; |
| 18 | }; |