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Aswath Govindrajua9d8cf22022-01-25 20:56:42 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 *
5 * Link to Common Processor Board: https://www.ti.com/lit/zip/sprr439
6 */
7
8/dts-v1/;
9
10#include "k3-j721s2-som-p0.dtsi"
11#include <dt-bindings/net/ti-dp83867.h>
12
13/ {
14 compatible = "ti,j721s2-evm", "ti,j721s2";
15 model = "Texas Instruments J721S2 EVM";
16
17 chosen {
18 stdout-path = "serial2:115200n8";
19 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
20 };
21
22 aliases {
23 serial2 = &main_uart8;
24 mmc0 = &main_sdhci0;
25 mmc1 = &main_sdhci1;
26 can0 = &main_mcan16;
27 can1 = &mcu_mcan0;
28 can2 = &mcu_mcan1;
29 };
30
31 evm_12v0: fixedregulator-evm12v0 {
32 /* main supply */
33 compatible = "regulator-fixed";
34 regulator-name = "evm_12v0";
35 regulator-min-microvolt = <12000000>;
36 regulator-max-microvolt = <12000000>;
37 regulator-always-on;
38 regulator-boot-on;
39 };
40
41 vsys_3v3: fixedregulator-vsys3v3 {
42 /* Output of LM5140 */
43 compatible = "regulator-fixed";
44 regulator-name = "vsys_3v3";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
47 vin-supply = <&evm_12v0>;
48 regulator-always-on;
49 regulator-boot-on;
50 };
51
52 vsys_5v0: fixedregulator-vsys5v0 {
53 /* Output of LM5140 */
54 compatible = "regulator-fixed";
55 regulator-name = "vsys_5v0";
56 regulator-min-microvolt = <5000000>;
57 regulator-max-microvolt = <5000000>;
58 vin-supply = <&evm_12v0>;
59 regulator-always-on;
60 regulator-boot-on;
61 };
62
63 vdd_mmc1: fixedregulator-sd {
64 /* Output of TPS22918 */
65 compatible = "regulator-fixed";
66 regulator-name = "vdd_mmc1";
67 regulator-min-microvolt = <3300000>;
68 regulator-max-microvolt = <3300000>;
69 regulator-boot-on;
70 enable-active-high;
71 vin-supply = <&vsys_3v3>;
72 gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
73 };
74
75 vdd_sd_dv: gpio-regulator-TLV71033 {
76 /* Output of TLV71033 */
77 compatible = "regulator-gpio";
78 regulator-name = "tlv71033";
79 pinctrl-names = "default";
80 pinctrl-0 = <&vdd_sd_dv_pins_default>;
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <3300000>;
83 regulator-boot-on;
84 vin-supply = <&vsys_5v0>;
85 gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>;
86 states = <1800000 0x0>,
87 <3300000 0x1>;
88 };
89
90 transceiver1: can-phy1 {
91 compatible = "ti,tcan1043";
92 #phy-cells = <0>;
93 max-bitrate = <5000000>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
96 standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>;
97 enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
98 };
99
100 transceiver2: can-phy2 {
101 compatible = "ti,tcan1042";
102 #phy-cells = <0>;
103 max-bitrate = <5000000>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
106 standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
107 };
108
109};
110
111&main_pmx0 {
112 main_uart8_pins_default: main-uart8-pins-default {
113 pinctrl-single,pins = <
114 J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
115 J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
116 J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
117 J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
118 >;
119 };
120
121 main_i2c3_pins_default: main-i2c3-pins-default {
122 pinctrl-single,pins = <
123 J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */
124 J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */
125 >;
126 };
127
128 main_mmc1_pins_default: main-mmc1-pins-default {
129 pinctrl-single,pins = <
130 J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
131 J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
132 J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
133 J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
134 J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
135 J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
136 J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
137 J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
138 >;
139 };
140
141 vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
142 pinctrl-single,pins = <
143 J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
144 >;
145 };
146};
147
148&wkup_pmx0 {
149 mcu_cpsw_pins_default: mcu-cpsw-pins-default {
150 pinctrl-single,pins = <
151 J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
152 J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
153 J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
154 J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
155 J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
156 J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
157 J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
158 J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
159 J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
160 J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
161 J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
162 J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
163 >;
164 };
165
166 mcu_mdio_pins_default: mcu-mdio-pins-default {
167 pinctrl-single,pins = <
168 J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
169 J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
170 >;
171 };
172
173 mcu_mcan0_pins_default: mcu-mcan0-pins-default {
174 pinctrl-single,pins = <
175 J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
176 J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
177 >;
178 };
179
180 mcu_mcan1_pins_default: mcu-mcan1-pins-default {
181 pinctrl-single,pins = <
182 J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
183 J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX */
184 >;
185 };
186
187 mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
188 pinctrl-single,pins = <
189 J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */
190 J721S2_WKUP_IOPAD(0x0a8, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */
191 >;
192 };
193
194 mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default {
195 pinctrl-single,pins = <
196 J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */
197 >;
198 };
199};
200
201&main_gpio2 {
202 status = "disabled";
203};
204
205&main_gpio4 {
206 status = "disabled";
207};
208
209&main_gpio6 {
210 status = "disabled";
211};
212
213&wkup_gpio1 {
214 status = "disabled";
215};
216
217&wkup_uart0 {
218 status = "reserved";
219};
220
221&main_uart0 {
222 status = "disabled";
223};
224
225&main_uart1 {
226 status = "disabled";
227};
228
229&main_uart2 {
230 status = "disabled";
231};
232
233&main_uart3 {
234 status = "disabled";
235};
236
237&main_uart4 {
238 status = "disabled";
239};
240
241&main_uart5 {
242 status = "disabled";
243};
244
245&main_uart6 {
246 status = "disabled";
247};
248
249&main_uart7 {
250 status = "disabled";
251};
252
253&main_uart8 {
254 pinctrl-names = "default";
255 pinctrl-0 = <&main_uart8_pins_default>;
256 /* Shared with TFA on this platform */
257 power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
258};
259
260&main_uart9 {
261 status = "disabled";
262};
263
264&main_i2c0 {
265 clock-frequency = <400000>;
266
267 exp1: gpio@20 {
268 compatible = "ti,tca6416";
269 reg = <0x20>;
270 gpio-controller;
271 #gpio-cells = <2>;
272 gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ",
273 "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ",
274 "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#",
275 "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1",
276 "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz";
277 };
278
279 exp2: gpio@22 {
280 compatible = "ti,tca6424";
281 reg = <0x22>;
282 gpio-controller;
283 #gpio-cells = <2>;
284 gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN",
285 "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#",
286 "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1",
287 "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL",
288 "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL",
289 "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2";
290 };
291};
292
293&main_i2c1 {
294 status = "disabled";
295};
296
297&main_i2c2 {
298 status = "disabled";
299};
300
301&main_i2c3 {
302 status = "disabled";
303};
304
305&main_i2c4 {
306 status = "disabled";
307};
308
309&main_i2c5 {
310 status = "disabled";
311};
312
313&main_i2c6 {
314 status = "disabled";
315};
316
317&main_sdhci0 {
318 /* eMMC */
319 non-removable;
320 ti,driver-strength-ohm = <50>;
321 disable-wp;
322};
323
324&main_sdhci1 {
325 /* SD card */
326 pinctrl-0 = <&main_mmc1_pins_default>;
327 pinctrl-names = "default";
328 disable-wp;
329 vmmc-supply = <&vdd_mmc1>;
330 vqmmc-supply = <&vdd_sd_dv>;
331};
332
333&mcu_cpsw {
334 pinctrl-names = "default";
335 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
336};
337
338&davinci_mdio {
339 phy0: ethernet-phy@0 {
340 reg = <0>;
341 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
342 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
343 ti,min-output-impedance;
344 };
345};
346
347&cpsw_port1 {
348 phy-mode = "rgmii-rxid";
349 phy-handle = <&phy0>;
350};
351
352&mcu_mcan0 {
353 pinctrl-names = "default";
354 pinctrl-0 = <&mcu_mcan0_pins_default>;
355 phys = <&transceiver1>;
356};
357
358&mcu_mcan1 {
359 pinctrl-names = "default";
360 pinctrl-0 = <&mcu_mcan1_pins_default>;
361 phys = <&transceiver2>;
362};
363
364&main_mcan0 {
365 status = "disabled";
366};
367
368&main_mcan1 {
369 status = "disabled";
370};
371
372&main_mcan2 {
373 status = "disabled";
374};
375
376&main_mcan3 {
377 status = "disabled";
378};
379
380&main_mcan4 {
381 status = "disabled";
382};
383
384&main_mcan5 {
385 status = "disabled";
386};
387
388&main_mcan6 {
389 status = "disabled";
390};
391
392&main_mcan7 {
393 status = "disabled";
394};
395
396&main_mcan8 {
397 status = "disabled";
398};
399
400&main_mcan9 {
401 status = "disabled";
402};
403
404&main_mcan10 {
405 status = "disabled";
406};
407
408&main_mcan11 {
409 status = "disabled";
410};
411
412&main_mcan12 {
413 status = "disabled";
414};
415
416&main_mcan13 {
417 status = "disabled";
418};
419
420&main_mcan14 {
421 status = "disabled";
422};
423
424&main_mcan15 {
425 status = "disabled";
426};
427
428&main_mcan17 {
429 status = "disabled";
430};