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Wolfgang Denk7b64fef2006-10-24 14:21:16 +02001/*
2 * System registers for AVR32
3 */
4#ifndef __ASM_AVR32_SYSREG_H__
5#define __ASM_AVR32_SYSREG_H__
6
7/* system register offsets */
8#define SYSREG_SR 0x0000
9#define SYSREG_EVBA 0x0004
10#define SYSREG_ACBA 0x0008
11#define SYSREG_CPUCR 0x000c
12#define SYSREG_ECR 0x0010
13#define SYSREG_RSR_SUP 0x0014
14#define SYSREG_RSR_INT0 0x0018
15#define SYSREG_RSR_INT1 0x001c
16#define SYSREG_RSR_INT2 0x0020
17#define SYSREG_RSR_INT3 0x0024
18#define SYSREG_RSR_EX 0x0028
19#define SYSREG_RSR_NMI 0x002c
20#define SYSREG_RSR_DBG 0x0030
21#define SYSREG_RAR_SUP 0x0034
22#define SYSREG_RAR_INT0 0x0038
23#define SYSREG_RAR_INT1 0x003c
24#define SYSREG_RAR_INT2 0x0040
25#define SYSREG_RAR_INT3 0x0044
26#define SYSREG_RAR_EX 0x0048
27#define SYSREG_RAR_NMI 0x004c
28#define SYSREG_RAR_DBG 0x0050
29#define SYSREG_JECR 0x0054
30#define SYSREG_JOSP 0x0058
31#define SYSREG_JAVA_LV0 0x005c
32#define SYSREG_JAVA_LV1 0x0060
33#define SYSREG_JAVA_LV2 0x0064
34#define SYSREG_JAVA_LV3 0x0068
35#define SYSREG_JAVA_LV4 0x006c
36#define SYSREG_JAVA_LV5 0x0070
37#define SYSREG_JAVA_LV6 0x0074
38#define SYSREG_JAVA_LV7 0x0078
39#define SYSREG_JTBA 0x007c
40#define SYSREG_JBCR 0x0080
41#define SYSREG_CONFIG0 0x0100
42#define SYSREG_CONFIG1 0x0104
43#define SYSREG_COUNT 0x0108
44#define SYSREG_COMPARE 0x010c
45#define SYSREG_TLBEHI 0x0110
46#define SYSREG_TLBELO 0x0114
47#define SYSREG_PTBR 0x0118
48#define SYSREG_TLBEAR 0x011c
49#define SYSREG_MMUCR 0x0120
50#define SYSREG_TLBARLO 0x0124
51#define SYSREG_TLBARHI 0x0128
52#define SYSREG_PCCNT 0x012c
53#define SYSREG_PCNT0 0x0130
54#define SYSREG_PCNT1 0x0134
55#define SYSREG_PCCR 0x0138
56#define SYSREG_BEAR 0x013c
57#define SYSREG_SABAL 0x0300
58#define SYSREG_SABAH 0x0304
59#define SYSREG_SABD 0x0308
60
61/* Bitfields in SR */
62#define SYSREG_SR_C_OFFSET 0
63#define SYSREG_SR_C_SIZE 1
64#define SYSREG_Z_OFFSET 1
65#define SYSREG_Z_SIZE 1
66#define SYSREG_SR_N_OFFSET 2
67#define SYSREG_SR_N_SIZE 1
68#define SYSREG_SR_V_OFFSET 3
69#define SYSREG_SR_V_SIZE 1
70#define SYSREG_Q_OFFSET 4
71#define SYSREG_Q_SIZE 1
72#define SYSREG_L_OFFSET 5
73#define SYSREG_L_SIZE 1
74#define SYSREG_T_OFFSET 14
75#define SYSREG_T_SIZE 1
76#define SYSREG_SR_R_OFFSET 15
77#define SYSREG_SR_R_SIZE 1
78#define SYSREG_GM_OFFSET 16
79#define SYSREG_GM_SIZE 1
80#define SYSREG_I0M_OFFSET 17
81#define SYSREG_I0M_SIZE 1
82#define SYSREG_I1M_OFFSET 18
83#define SYSREG_I1M_SIZE 1
84#define SYSREG_I2M_OFFSET 19
85#define SYSREG_I2M_SIZE 1
86#define SYSREG_I3M_OFFSET 20
87#define SYSREG_I3M_SIZE 1
88#define SYSREG_EM_OFFSET 21
89#define SYSREG_EM_SIZE 1
90#define SYSREG_M0_OFFSET 22
91#define SYSREG_M0_SIZE 1
92#define SYSREG_M1_OFFSET 23
93#define SYSREG_M1_SIZE 1
94#define SYSREG_M2_OFFSET 24
95#define SYSREG_M2_SIZE 1
96#define SYSREG_SR_D_OFFSET 26
97#define SYSREG_SR_D_SIZE 1
98#define SYSREG_DM_OFFSET 27
99#define SYSREG_DM_SIZE 1
100#define SYSREG_SR_J_OFFSET 28
101#define SYSREG_SR_J_SIZE 1
102#define SYSREG_H_OFFSET 29
103#define SYSREG_H_SIZE 1
104
105/* Bitfields in CPUCR */
106#define SYSREG_BI_OFFSET 0
107#define SYSREG_BI_SIZE 1
108#define SYSREG_BE_OFFSET 1
109#define SYSREG_BE_SIZE 1
110#define SYSREG_FE_OFFSET 2
111#define SYSREG_FE_SIZE 1
112#define SYSREG_RE_OFFSET 3
113#define SYSREG_RE_SIZE 1
114#define SYSREG_IBE_OFFSET 4
115#define SYSREG_IBE_SIZE 1
116#define SYSREG_IEE_OFFSET 5
117#define SYSREG_IEE_SIZE 1
118
119/* Bitfields in ECR */
120#define SYSREG_ECR_OFFSET 0
121#define SYSREG_ECR_SIZE 32
122
123/* Bitfields in CONFIG0 */
124#define SYSREG_CONFIG0_R_OFFSET 0
125#define SYSREG_CONFIG0_R_SIZE 1
126#define SYSREG_CONFIG0_D_OFFSET 1
127#define SYSREG_CONFIG0_D_SIZE 1
128#define SYSREG_CONFIG0_S_OFFSET 2
129#define SYSREG_CONFIG0_S_SIZE 1
130#define SYSREG_O_OFFSET 3
131#define SYSREG_O_SIZE 1
132#define SYSREG_P_OFFSET 4
133#define SYSREG_P_SIZE 1
134#define SYSREG_CONFIG0_J_OFFSET 5
135#define SYSREG_CONFIG0_J_SIZE 1
136#define SYSREG_F_OFFSET 6
137#define SYSREG_F_SIZE 1
138#define SYSREG_MMUT_OFFSET 7
139#define SYSREG_MMUT_SIZE 3
140#define SYSREG_AR_OFFSET 10
141#define SYSREG_AR_SIZE 3
142#define SYSREG_AT_OFFSET 13
143#define SYSREG_AT_SIZE 3
144#define SYSREG_PROCESSORREVISION_OFFSET 16
145#define SYSREG_PROCESSORREVISION_SIZE 8
146#define SYSREG_PROCESSORID_OFFSET 24
147#define SYSREG_PROCESSORID_SIZE 8
148
149/* Bitfields in CONFIG1 */
150#define SYSREG_DASS_OFFSET 0
151#define SYSREG_DASS_SIZE 3
152#define SYSREG_DLSZ_OFFSET 3
153#define SYSREG_DLSZ_SIZE 3
154#define SYSREG_DSET_OFFSET 6
155#define SYSREG_DSET_SIZE 4
156#define SYSREG_IASS_OFFSET 10
157#define SYSREG_IASS_SIZE 3
158#define SYSREG_ILSZ_OFFSET 13
159#define SYSREG_ILSZ_SIZE 3
160#define SYSREG_ISET_OFFSET 16
161#define SYSREG_ISET_SIZE 4
162#define SYSREG_DMMUSZ_OFFSET 20
163#define SYSREG_DMMUSZ_SIZE 6
164#define SYSREG_IMMUSZ_OFFSET 26
165#define SYSREG_IMMUSZ_SIZE 6
166
167/* Bitfields in TLBEHI */
168#define SYSREG_ASID_OFFSET 0
169#define SYSREG_ASID_SIZE 8
170#define SYSREG_TLBEHI_I_OFFSET 8
171#define SYSREG_TLBEHI_I_SIZE 1
172#define SYSREG_TLBEHI_V_OFFSET 9
173#define SYSREG_TLBEHI_V_SIZE 1
174#define SYSREG_VPN_OFFSET 10
175#define SYSREG_VPN_SIZE 22
176
177/* Bitfields in TLBELO */
178#define SYSREG_W_OFFSET 0
179#define SYSREG_W_SIZE 1
180#define SYSREG_TLBELO_D_OFFSET 1
181#define SYSREG_TLBELO_D_SIZE 1
182#define SYSREG_SZ_OFFSET 2
183#define SYSREG_SZ_SIZE 2
184#define SYSREG_AP_OFFSET 4
185#define SYSREG_AP_SIZE 3
186#define SYSREG_B_OFFSET 7
187#define SYSREG_B_SIZE 1
188#define SYSREG_G_OFFSET 8
189#define SYSREG_G_SIZE 1
190#define SYSREG_TLBELO_C_OFFSET 9
191#define SYSREG_TLBELO_C_SIZE 1
192#define SYSREG_PFN_OFFSET 10
193#define SYSREG_PFN_SIZE 22
194
195/* Bitfields in MMUCR */
196#define SYSREG_E_OFFSET 0
197#define SYSREG_E_SIZE 1
198#define SYSREG_M_OFFSET 1
199#define SYSREG_M_SIZE 1
200#define SYSREG_MMUCR_I_OFFSET 2
201#define SYSREG_MMUCR_I_SIZE 1
202#define SYSREG_MMUCR_N_OFFSET 3
203#define SYSREG_MMUCR_N_SIZE 1
204#define SYSREG_MMUCR_S_OFFSET 4
205#define SYSREG_MMUCR_S_SIZE 1
206#define SYSREG_DLA_OFFSET 8
207#define SYSREG_DLA_SIZE 6
208#define SYSREG_DRP_OFFSET 14
209#define SYSREG_DRP_SIZE 6
210#define SYSREG_ILA_OFFSET 20
211#define SYSREG_ILA_SIZE 6
212#define SYSREG_IRP_OFFSET 26
213#define SYSREG_IRP_SIZE 6
214
215/* Bitfields in PCCR */
216#define SYSREG_PCCR_R_OFFSET 1
217#define SYSREG_PCCR_R_SIZE 1
218#define SYSREG_PCCR_C_OFFSET 2
219#define SYSREG_PCCR_C_SIZE 1
220#define SYSREG_PCCR_S_OFFSET 3
221#define SYSREG_PCCR_S_SIZE 1
222#define SYSREG_IEC_OFFSET 4
223#define SYSREG_IEC_SIZE 1
224#define SYSREG_IE0_OFFSET 5
225#define SYSREG_IE0_SIZE 1
226#define SYSREG_IE1_OFFSET 6
227#define SYSREG_IE1_SIZE 1
228#define SYSREG_FC_OFFSET 8
229#define SYSREG_FC_SIZE 1
230#define SYSREG_F0_OFFSET 9
231#define SYSREG_F0_SIZE 1
232#define SYSREG_F1_OFFSET 10
233#define SYSREG_F1_SIZE 1
234#define SYSREG_CONF0_OFFSET 12
235#define SYSREG_CONF0_SIZE 6
236#define SYSREG_CONF1_OFFSET 18
237#define SYSREG_CONF1_SIZE 6
238
239/* Constants for ECR */
240#define ECR_UNRECOVERABLE 0
241#define ECR_TLB_MULTIPLE 1
242#define ECR_BUS_ERROR_WRITE 2
243#define ECR_BUS_ERROR_READ 3
244#define ECR_NMI 4
245#define ECR_ADDR_ALIGN_X 5
246#define ECR_PROTECTION_X 6
247#define ECR_DEBUG 7
248#define ECR_ILLEGAL_OPCODE 8
249#define ECR_UNIMPL_INSTRUCTION 9
250#define ECR_PRIVILEGE_VIOLATION 10
251#define ECR_FPE 11
252#define ECR_COPROC_ABSENT 12
253#define ECR_ADDR_ALIGN_R 13
254#define ECR_ADDR_ALIGN_W 14
255#define ECR_PROTECTION_R 15
256#define ECR_PROTECTION_W 16
257#define ECR_DTLB_MODIFIED 17
258#define ECR_TLB_MISS_X 20
259#define ECR_TLB_MISS_R 24
260#define ECR_TLB_MISS_W 28
261
262/* Bit manipulation macros */
263#define SYSREG_BIT(name) (1 << SYSREG_##name##_OFFSET)
264#define SYSREG_BF(name,value) \
265 (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \
266 << SYSREG_##name##_OFFSET)
267#define SYSREG_BFEXT(name,value) \
268 (((value) >> SYSREG_##name##_OFFSET) \
269 & ((1 << SYSREG_##name##_SIZE) - 1))
270#define SYSREG_BFINS(name,value,old) \
271 (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \
272 << SYSREG_##name##_OFFSET)) \
273 | SYSREG_BF(name,value))
274
275/* Register access macros */
Stefan Roesef2302d42008-08-06 14:05:38 +0200276#define sysreg_read(reg) \
277 ((unsigned long)__builtin_mfsr(SYSREG_##reg))
278#define sysreg_write(reg, value) \
279 __builtin_mtsr(SYSREG_##reg, value)
Wolfgang Denk7b64fef2006-10-24 14:21:16 +0200280
281#endif /* __ASM_AVR32_SYSREG_H__ */