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Max Filippovb25732c2016-08-07 08:53:00 +03001#
2# System reset devices
3#
4
5menu "System reset device drivers"
6
7config SYSRESET
8 bool "Enable support for system reset drivers"
9 depends on DM
10 help
11 Enable system reset drivers which can be used to reset the CPU or
12 board. Each driver can provide a reset method which will be called
13 to effect a reset. The uclass will try all available drivers when
14 reset_walk() is called.
15
Kever Yang09259fc2019-04-02 20:41:25 +080016config SPL_SYSRESET
17 bool "Enable support for system reset drivers in SPL mode"
18 depends on SYSRESET && SPL_DM
19 help
20 Enable system reset drivers which can be used to reset the CPU or
21 board. Each driver can provide a reset method which will be called
22 to effect a reset. The uclass will try all available drivers when
23 reset_walk() is called.
24
25config TPL_SYSRESET
26 bool "Enable support for system reset drivers in TPL mode"
27 depends on SYSRESET && TPL_DM
28 help
29 Enable system reset drivers which can be used to reset the CPU or
30 board. Each driver can provide a reset method which will be called
31 to effect a reset. The uclass will try all available drivers when
32 reset_walk() is called.
33
Masahiro Yamada573a3812017-04-14 11:10:24 +090034if SYSRESET
35
Michal Simek0d832b32018-07-13 11:04:56 +020036config SYSRESET_GPIO
37 bool "Enable support for GPIO reset driver"
Chris Packham26680b92019-04-13 20:35:23 +120038 select DM_GPIO
Michal Simek0d832b32018-07-13 11:04:56 +020039 help
40 Reset support via GPIO pin connected reset logic. This is used for
41 example on Microblaze where reset logic can be controlled via GPIO
42 pin which triggers cpu reset.
43
Michal Simekcae39ae2018-07-13 17:00:13 +020044config SYSRESET_MICROBLAZE
45 bool "Enable support for Microblaze soft reset"
46 depends on MICROBLAZE
47 help
48 This is soft reset on Microblaze which does jump to 0x0 address.
49
Masahiro Yamada573a3812017-04-14 11:10:24 +090050config SYSRESET_PSCI
51 bool "Enable support for PSCI System Reset"
52 depends on ARM_PSCI_FW
Simon Goldschmidta8b50312019-07-16 21:29:32 +020053 select SPL_ARM_PSCI_FW if SPL
Masahiro Yamada573a3812017-04-14 11:10:24 +090054 help
55 Enable PSCI SYSTEM_RESET function call. To use this, PSCI firmware
56 must be running on your system.
57
Simon Goldschmidt1f166882019-07-15 21:47:53 +020058config SYSRESET_SOCFPGA
59 bool "Enable support for Intel SOCFPGA family"
60 depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10)
61 help
62 This enables the system reset driver support for Intel SOCFPGA SoCs
63 (Cyclone 5, Arria 5 and Arria 10).
64
Simon Goldschmidt690c1292019-07-15 21:47:54 +020065config SYSRESET_SOCFPGA_S10
66 bool "Enable support for Intel SOCFPGA Stratix 10"
67 depends on ARCH_SOCFPGA && TARGET_SOCFPGA_STRATIX10
68 help
69 This enables the system reset driver support for Intel SOCFPGA
70 Stratix SoCs.
71
Andreas Dannenberg694b0522018-08-27 15:57:46 +053072config SYSRESET_TI_SCI
73 bool "TI System Control Interface (TI SCI) system reset driver"
74 depends on TI_SCI_PROTOCOL
75 help
76 This enables the system reset driver support over TI System Control
77 Interface available on some new TI's SoCs.
78
Masahiro Yamada573a3812017-04-14 11:10:24 +090079endif
Álvaro Fernández Rojase3889692017-04-25 00:39:14 +020080
81config SYSRESET_SYSCON
82 bool "Enable support for mfd syscon reboot driver"
83 select REGMAP
84 select SYSCON
85 help
86 Reboot support for generic SYSCON mapped register reset.
87
Álvaro Fernández Rojas17a0c142017-05-16 18:29:13 +020088config SYSRESET_WATCHDOG
89 bool "Enable support for watchdog reboot driver"
90 select WDT
91 help
92 Reboot support for generic watchdog reset.
93
Bin Mengfabb2b42018-07-03 02:48:40 -070094config SYSRESET_X86
95 bool "Enable support for x86 processor reboot driver"
96 depends on X86
97 help
98 Reboot support for generic x86 processor reset.
99
Mario Six76fdad12018-08-06 10:23:35 +0200100config SYSRESET_MCP83XX
101 bool "Enable support MPC83xx SoC family reboot driver"
102 help
103 Reboot support for NXP MPC83xx SoCs.
104
Max Filippovb25732c2016-08-07 08:53:00 +0300105endmenu