blob: 65c4456977cc69971fb1dff699d18013458d6402 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Peng Fan1c1f6072015-08-14 11:36:16 +02002/*
3 * Copyright (C) 2015 Freescale Semiconductor, Inc
4 * Peng Fan <Peng.Fan@freescale.com>
Peng Fan1c1f6072015-08-14 11:36:16 +02005 */
6
7#include <common.h>
8#include <fdtdec.h>
9#include <errno.h>
10#include <dm.h>
11#include <i2c.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060012#include <log.h>
Peng Fan1c1f6072015-08-14 11:36:16 +020013#include <power/pmic.h>
14#include <power/regulator.h>
15#include <power/pfuze100_pmic.h>
Trent Piepho7da7ff52018-04-25 10:06:00 -070016#include <power/pfuze3000_pmic.h>
Peng Fan1c1f6072015-08-14 11:36:16 +020017
Peng Fan1c1f6072015-08-14 11:36:16 +020018static const struct pmic_child_info pmic_children_info[] = {
19 /* sw[x], swbst */
20 { .prefix = "s", .driver = PFUZE100_REGULATOR_DRIVER },
21 /* vgen[x], vsnvs, vcc, v33, vcc_sd */
22 { .prefix = "v", .driver = PFUZE100_REGULATOR_DRIVER },
23 { },
24};
25
26static int pfuze100_reg_count(struct udevice *dev)
27{
Trent Piepho7da7ff52018-04-25 10:06:00 -070028 return dev->driver_data == PFUZE3000 ? PFUZE3000_NUM_OF_REGS : PFUZE100_NUM_OF_REGS;
Peng Fan1c1f6072015-08-14 11:36:16 +020029}
30
31static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff,
32 int len)
33{
34 if (dm_i2c_write(dev, reg, buff, len)) {
Simon Glassc83c4362018-11-18 08:14:28 -070035 pr_err("write error to device: %p register: %#x!\n", dev, reg);
Peng Fan1c1f6072015-08-14 11:36:16 +020036 return -EIO;
37 }
38
39 return 0;
40}
41
42static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
43{
44 if (dm_i2c_read(dev, reg, buff, len)) {
Fabio Estevam417ea632020-04-17 09:27:10 -030045 debug("read error from device: %p register: %#x!\n", dev, reg);
Peng Fan1c1f6072015-08-14 11:36:16 +020046 return -EIO;
47 }
48
49 return 0;
50}
51
52static int pfuze100_bind(struct udevice *dev)
53{
Simon Glass7a869e62017-05-18 20:09:32 -060054 ofnode regulators_node;
Peng Fan1c1f6072015-08-14 11:36:16 +020055 int children;
Peng Fan1c1f6072015-08-14 11:36:16 +020056
Simon Glass7a869e62017-05-18 20:09:32 -060057 regulators_node = dev_read_subnode(dev, "regulators");
58 if (!ofnode_valid(regulators_node)) {
Simon Glassc83c4362018-11-18 08:14:28 -070059 debug("%s: %s regulators subnode not found!\n", __func__,
Peng Fan1c1f6072015-08-14 11:36:16 +020060 dev->name);
61 return -ENXIO;
62 }
63
64 debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
65
66 children = pmic_bind_children(dev, regulators_node, pmic_children_info);
67 if (!children)
68 debug("%s: %s - no child found\n", __func__, dev->name);
69
70 /* Always return success for this device */
71 return 0;
72}
73
74static struct dm_pmic_ops pfuze100_ops = {
75 .reg_count = pfuze100_reg_count,
76 .read = pfuze100_read,
77 .write = pfuze100_write,
78};
79
80static const struct udevice_id pfuze100_ids[] = {
81 { .compatible = "fsl,pfuze100", .data = PFUZE100, },
82 { .compatible = "fsl,pfuze200", .data = PFUZE200, },
83 { .compatible = "fsl,pfuze3000", .data = PFUZE3000, },
84 { }
85};
86
87U_BOOT_DRIVER(pmic_pfuze100) = {
88 .name = "pfuze100 pmic",
89 .id = UCLASS_PMIC,
90 .of_match = pfuze100_ids,
91 .bind = pfuze100_bind,
92 .ops = &pfuze100_ops,
93};