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Ian Campbellcba69ee2014-05-05 11:52:26 +01001/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
16/*
17 * High Level Configuration Options
18 */
19#define CONFIG_SUNXI /* sunxi family */
Ian Campbell50827a52014-05-05 11:52:30 +010020#ifdef CONFIG_SPL_BUILD
21#ifndef CONFIG_SPL_FEL
22#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
23#endif
24#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010025
26#include <asm/arch/cpu.h> /* get chip and board defs */
27
28#define CONFIG_SYS_TEXT_BASE 0x4a000000
29
30/*
31 * Display CPU information
32 */
33#define CONFIG_DISPLAY_CPUINFO
34
35/* Serial & console */
36#define CONFIG_SYS_NS16550
37#define CONFIG_SYS_NS16550_SERIAL
38/* ns16550 reg in the low bits of cpu reg */
39#define CONFIG_SYS_NS16550_REG_SIZE -4
40#define CONFIG_SYS_NS16550_CLK 24000000
41#define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
42#define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
43#define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
44#define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
45
46/* DRAM Base */
47#define CONFIG_SYS_SDRAM_BASE 0x40000000
48#define CONFIG_SYS_INIT_RAM_ADDR 0x0
49#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
50
51#define CONFIG_SYS_INIT_SP_OFFSET \
52 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
53#define CONFIG_SYS_INIT_SP_ADDR \
54 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
55
56#define CONFIG_NR_DRAM_BANKS 1
57#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
58#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
59
Ian Campbella6e50a82014-07-18 20:38:41 +010060#ifdef CONFIG_AHCI
61#define CONFIG_LIBATA
62#define CONFIG_SCSI_AHCI
63#define CONFIG_SCSI_AHCI_PLAT
64#define CONFIG_SUNXI_AHCI
65#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
66#define CONFIG_SYS_SCSI_MAX_LUN 1
67#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
68 CONFIG_SYS_SCSI_MAX_LUN)
69#define CONFIG_CMD_SCSI
70#endif
71
Ian Campbellcba69ee2014-05-05 11:52:26 +010072#define CONFIG_CMD_MEMORY
73#define CONFIG_CMD_SETEXPR
74
75#define CONFIG_SETUP_MEMORY_TAGS
76#define CONFIG_CMDLINE_TAG
77#define CONFIG_INITRD_TAG
78
Ian Campbelle24ea552014-05-05 14:42:31 +010079/* mmc config */
80#define CONFIG_MMC
81#define CONFIG_GENERIC_MMC
82#define CONFIG_CMD_MMC
83#define CONFIG_MMC_SUNXI
84#define CONFIG_MMC_SUNXI_SLOT 0
Ian Campbelle24ea552014-05-05 14:42:31 +010085#define CONFIG_ENV_IS_IN_MMC
86#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
87
Ian Campbellcba69ee2014-05-05 11:52:26 +010088/* 4MB of malloc() pool */
89#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
90
91/*
92 * Miscellaneous configurable options
93 */
94#define CONFIG_CMD_ECHO
95#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
96#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
97#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
98#define CONFIG_SYS_GENERIC_BOARD
99
100/* Boot Argument Buffer Size */
101#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
102
Hans de Goede846e3252014-08-01 09:37:58 +0200103#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100104
105/* standalone support */
Hans de Goede846e3252014-08-01 09:37:58 +0200106#define CONFIG_STANDALONE_LOAD_ADDR 0x42000000
Ian Campbellcba69ee2014-05-05 11:52:26 +0100107
Ian Campbellcba69ee2014-05-05 11:52:26 +0100108/* baudrate */
109#define CONFIG_BAUDRATE 115200
110
111/* The stack sizes are set up in start.S using the settings below */
112#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
113
114/* FLASH and environment organization */
115
116#define CONFIG_SYS_NO_FLASH
117
118#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */
119#define CONFIG_IDENT_STRING " Allwinner Technology"
120
Ian Campbelle24ea552014-05-05 14:42:31 +0100121#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100122#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
123
Ian Campbellcba69ee2014-05-05 11:52:26 +0100124#include <config_cmd_default.h>
Hans de Goedeb9fb3b92014-08-01 09:19:55 +0200125#undef CONFIG_CMD_FPGA
Ian Campbellcba69ee2014-05-05 11:52:26 +0100126
127#define CONFIG_FAT_WRITE /* enable write access */
128
129#define CONFIG_SPL_FRAMEWORK
130#define CONFIG_SPL_LIBCOMMON_SUPPORT
131#define CONFIG_SPL_SERIAL_SUPPORT
132#define CONFIG_SPL_LIBGENERIC_SUPPORT
133
Ian Campbell50827a52014-05-05 11:52:30 +0100134#ifdef CONFIG_SPL_FEL
135
Ian Campbellcba69ee2014-05-05 11:52:26 +0100136#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
137#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
138#define CONFIG_SPL_TEXT_BASE 0x2000
139#define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */
Ian Campbell50827a52014-05-05 11:52:30 +0100140
141#else /* CONFIG_SPL */
142
143#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
144#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */
145
146#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
147#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
148
149#define CONFIG_SPL_LIBDISK_SUPPORT
150#define CONFIG_SPL_MMC_SUPPORT
151
152#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
153
154#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
155#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
156
157#endif /* CONFIG_SPL */
158
Ian Campbellcba69ee2014-05-05 11:52:26 +0100159/* end of 32 KiB in sram */
160#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
161#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
162#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
163#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
164
Hans de Goede66203772014-06-13 22:55:49 +0200165/* I2C */
166#define CONFIG_SPL_I2C_SUPPORT
167#define CONFIG_SYS_I2C
168#define CONFIG_SYS_I2C_MVTWSI
169#define CONFIG_SYS_I2C_SPEED 400000
170#define CONFIG_SYS_I2C_SLAVE 0x7f
171#define CONFIG_CMD_I2C
172
Henrik Nordstrom14bc66b2014-06-13 22:55:50 +0200173/* PMU */
174#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
175#define CONFIG_SPL_POWER_SUPPORT
176#endif
177
Hans de Goedef84269c2014-06-09 11:36:58 +0200178#ifndef CONFIG_CONS_INDEX
Ian Campbellcba69ee2014-05-05 11:52:26 +0100179#define CONFIG_CONS_INDEX 1 /* UART0 */
Hans de Goedef84269c2014-06-09 11:36:58 +0200180#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100181
Ian Campbellabce2c62014-06-05 19:00:15 +0100182/* GPIO */
183#define CONFIG_SUNXI_GPIO
184#define CONFIG_CMD_GPIO
185
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200186/* Ethernet support */
187#ifdef CONFIG_SUNXI_EMAC
188#define CONFIG_MII /* MII PHY management */
189#endif
190
Ian Campbell58358232014-05-05 11:52:28 +0100191#ifdef CONFIG_SUNXI_GMAC
192#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
193#define CONFIG_DW_AUTONEG
194#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
195#define CONFIG_PHY_ADDR 1
196#define CONFIG_MII /* MII PHY management */
197#define CONFIG_PHYLIB
198#endif
199
Roman Byshko3584f302014-07-24 22:54:22 +0200200#ifdef CONFIG_USB_EHCI
201#define CONFIG_CMD_USB
202#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
203#define CONFIG_USB_STORAGE
204#endif
205
Ian Campbellcba69ee2014-05-05 11:52:26 +0100206#if !defined CONFIG_ENV_IS_IN_MMC && \
207 !defined CONFIG_ENV_IS_IN_NAND && \
208 !defined CONFIG_ENV_IS_IN_FAT && \
209 !defined CONFIG_ENV_IS_IN_SPI_FLASH
210#define CONFIG_ENV_IS_NOWHERE
211#endif
212
Jonathan Liub41d7d02014-06-14 08:59:09 +0200213#define CONFIG_MISC_INIT_R
214
Ian Campbellcba69ee2014-05-05 11:52:26 +0100215#ifndef CONFIG_SPL_BUILD
216#include <config_distro_defaults.h>
Hans de Goede2ec3a612014-07-31 23:04:45 +0200217
Hans de Goede846e3252014-08-01 09:37:58 +0200218/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
219 * 1M script, 1M pxe and the ramdisk at the end */
220#define MEM_LAYOUT_ENV_SETTINGS \
221 "bootm_size=0x10000000\0" \
222 "kernel_addr_r=0x42000000\0" \
223 "fdt_addr_r=0x43000000\0" \
224 "scriptaddr=0x43100000\0" \
225 "pxefile_addr_r=0x43200000\0" \
226 "ramdisk_addr_r=0x43300000\0"
227
Hans de Goede2ec3a612014-07-31 23:04:45 +0200228#ifdef CONFIG_AHCI
229#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
230#else
231#define BOOT_TARGET_DEVICES_SCSI(func)
232#endif
233
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800234#ifdef CONFIG_USB_EHCI
235#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
236#else
237#define BOOT_TARGET_DEVICES_USB(func)
238#endif
239
Hans de Goede2ec3a612014-07-31 23:04:45 +0200240#define BOOT_TARGET_DEVICES(func) \
241 func(MMC, mmc, 0) \
242 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800243 BOOT_TARGET_DEVICES_USB(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200244 func(PXE, pxe, na) \
245 func(DHCP, dhcp, na)
246
247#include <config_distro_bootcmd.h>
248
249#define CONFIG_EXTRA_ENV_SETTINGS \
Hans de Goede846e3252014-08-01 09:37:58 +0200250 MEM_LAYOUT_ENV_SETTINGS \
Ian Campbell98e214d2014-08-31 13:13:43 +0100251 "fdtfile=" CONFIG_FDTFILE "\0" \
Hans de Goede846e3252014-08-01 09:37:58 +0200252 "console=ttyS0,115200\0" \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200253 BOOTENV
254
255#else /* ifndef CONFIG_SPL_BUILD */
256#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbellcba69ee2014-05-05 11:52:26 +0100257#endif
258
259#endif /* _SUNXI_COMMON_CONFIG_H */