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SARTRE Leo9b75bad2013-06-03 23:30:36 +00001/*
2 *
3 * Congatec Conga-QEVAl board configuration file.
4 *
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
SARTRE Leo9b75bad2013-06-03 23:30:36 +000011 */
12
13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
SARTRE Leo9b75bad2013-06-03 23:30:36 +000016#include "mx6_common.h"
17
SARTRE Leo9b75bad2013-06-03 23:30:36 +000018#define CONFIG_MACH_TYPE 4122
19
SARTRE Leo9b75bad2013-06-03 23:30:36 +000020/* Size of malloc() pool */
21#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
22
23#define CONFIG_BOARD_EARLY_INIT_F
24#define CONFIG_MISC_INIT_R
SARTRE Leo9b75bad2013-06-03 23:30:36 +000025
26#define CONFIG_MXC_UART
27#define CONFIG_MXC_UART_BASE UART2_BASE
28
29/* MMC Configs */
SARTRE Leo9b75bad2013-06-03 23:30:36 +000030#define CONFIG_SYS_FSL_ESDHC_ADDR 0
31
SARTRE Leo9b75bad2013-06-03 23:30:36 +000032/* Miscellaneous commands */
33#define CONFIG_CMD_BMODE
34
Otavio Salvador862187b2015-07-23 11:02:27 -030035/* Thermal support */
36#define CONFIG_IMX6_THERMAL
37
38#define CONFIG_CMD_FUSE
39#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
40#define CONFIG_MXC_OCOTP
41#endif
42
SARTRE Leo9b75bad2013-06-03 23:30:36 +000043#define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
44
45#define CONFIG_EXTRA_ENV_SETTINGS \
46 "script=boot.scr\0" \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -020047 "image=zImage\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +000048 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
49 "boot_dir=/boot\0" \
50 "console=ttymxc1\0" \
51 "fdt_high=0xffffffff\0" \
52 "initrd_high=0xffffffff\0" \
Otavio Salvador6584a1b2013-12-16 20:44:04 -020053 "fdt_addr=0x18000000\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +000054 "boot_fdt=try\0" \
55 "mmcdev=1\0" \
56 "mmcpart=1\0" \
57 "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
58 "mmcargs=setenv bootargs console=${console},${baudrate} " \
59 "root=${mmcroot}\0" \
60 "loadbootscript=" \
61 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
62 "bootscript=echo Running bootscript from mmc ...; " \
63 "source\0" \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -020064 "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
65 "${boot_dir}/${image}\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +000066 "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
67 "${boot_dir}/${fdt_file}\0" \
68 "mmcboot=echo Booting from mmc ...; " \
69 "run mmcargs; " \
70 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
71 "if run loadfdt; then " \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -020072 "bootz ${loadaddr} - ${fdt_addr}; " \
SARTRE Leo9b75bad2013-06-03 23:30:36 +000073 "else " \
74 "if test ${boot_fdt} = try; then " \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -020075 "bootz; " \
SARTRE Leo9b75bad2013-06-03 23:30:36 +000076 "else " \
77 "echo WARN: Cannot load the DT; " \
78 "fi; " \
79 "fi; " \
80 "else " \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -020081 "bootz; " \
SARTRE Leo9b75bad2013-06-03 23:30:36 +000082 "fi;\0"
83
84#define CONFIG_BOOTCOMMAND \
85 "mmc dev ${mmcdev};" \
86 "mmc dev ${mmcdev}; if mmc rescan; then " \
87 "if run loadbootscript; then " \
88 "run bootscript; " \
89 "else " \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -020090 "if run loadimage; then " \
SARTRE Leo9b75bad2013-06-03 23:30:36 +000091 "run mmcboot; " \
92 "else "\
93 "echo ERR: Fail to boot from mmc; " \
94 "fi; " \
95 "fi; " \
96 "else echo ERR: Fail to boot from mmc; fi"
97
SARTRE Leo9b75bad2013-06-03 23:30:36 +000098#define CONFIG_SYS_MEMTEST_START 0x10000000
99#define CONFIG_SYS_MEMTEST_END 0x10010000
100#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
101
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000102/* Physical Memory Map */
103#define CONFIG_NR_DRAM_BANKS 1
104#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
105#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
106
107#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
108#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
109#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
110
111#define CONFIG_SYS_INIT_SP_OFFSET \
112 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
113#define CONFIG_SYS_INIT_SP_ADDR \
114 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
115
Peter Robinson056845c2015-05-22 17:30:45 +0100116/* Environment organization */
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000117#define CONFIG_ENV_SIZE (8 * 1024)
118
119#define CONFIG_ENV_IS_IN_MMC
120
121#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
122#define CONFIG_SYS_MMC_ENV_DEV 0
123
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000124#endif /* __CONFIG_CGTQMX6EVAL_H */