blob: efa0284a50a956a8ace127ff0b7e3ee75623d488 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05302/*
Priyanka Singh3e90cfe2020-01-22 10:29:52 +00003 * Copyright 2020 NXP
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05304 * Copyright 2016 Freescale Semiconductor, Inc.
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +05305 */
6
7#ifndef __LS1012ARDB_H__
8#define __LS1012ARDB_H__
9
10#include "ls1012a_common.h"
11
Shengzhou Liub9e745b2016-08-26 18:30:39 +080012/* DDR */
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053013#define CONFIG_DIMM_SLOTS_PER_CTLR 1
14#define CONFIG_CHIP_SELECTS_PER_CTRL 1
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053015#define CONFIG_SYS_SDRAM_SIZE 0x40000000
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053016
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053017/*
18 * I2C IO expander
19 */
20
Yangbo Lu481fb012017-12-08 15:35:35 +080021#define I2C_MUX_IO_ADDR 0x24
Calvin Johnson7ab16472018-03-08 15:30:30 +053022#define I2C_MUX_IO2_ADDR 0x25
Yangbo Lu481fb012017-12-08 15:35:35 +080023#define I2C_MUX_IO_0 0
24#define I2C_MUX_IO_1 1
25#define SW_BOOT_MASK 0x03
26#define SW_BOOT_EMU 0x02
27#define SW_BOOT_BANK1 0x00
28#define SW_BOOT_BANK2 0x01
29#define SW_REV_MASK 0xF8
30#define SW_REV_A 0xF8
31#define SW_REV_B 0xF0
Yangbo Lu4a47bf82017-12-08 15:35:36 +080032#define SW_REV_C 0xE8
33#define SW_REV_C1 0xE0
34#define SW_REV_C2 0xD8
35#define SW_REV_D 0xD0
36#define SW_REV_E 0xC8
Calvin Johnson7ab16472018-03-08 15:30:30 +053037#define __PHY_MASK 0xF9
38#define __PHY_ETH2_MASK 0xFB
39#define __PHY_ETH1_MASK 0xFD
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053040
41/* MMC */
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053042#ifdef CONFIG_MMC
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053043#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053044#endif
45
Prabhakar Kushwaha9e0bb4c2016-12-26 12:15:08 +053046
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053047#define CONFIG_PCIE1 /* PCIE controller 1 */
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053048
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053049#define CONFIG_PCI_SCAN_SHOW
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +053050
Rajesh Bhagata81357a2017-11-30 16:44:38 +053051#undef CONFIG_EXTRA_ENV_SETTINGS
52#define CONFIG_EXTRA_ENV_SETTINGS \
53 "verify=no\0" \
Rajesh Bhagata81357a2017-11-30 16:44:38 +053054 "initrd_high=0xffffffffffffffff\0" \
55 "fdt_addr=0x00f00000\0" \
56 "kernel_addr=0x01000000\0" \
Priyanka Singh3e90cfe2020-01-22 10:29:52 +000057 "kernelheader_addr=0x600000\0" \
Rajesh Bhagata81357a2017-11-30 16:44:38 +053058 "scriptaddr=0x80000000\0" \
Vinitha Pillai-B57223c883f352018-01-09 23:03:42 +053059 "scripthdraddr=0x80080000\0" \
Rajesh Bhagata81357a2017-11-30 16:44:38 +053060 "fdtheader_addr_r=0x80100000\0" \
61 "kernelheader_addr_r=0x80200000\0" \
Biwen Li63d34642020-01-10 17:16:04 +080062 "kernel_addr_r=0x96000000\0" \
Rajesh Bhagata81357a2017-11-30 16:44:38 +053063 "fdt_addr_r=0x90000000\0" \
64 "load_addr=0xa0000000\0" \
65 "kernel_size=0x2800000\0" \
Vinitha Pillai-B57223c883f352018-01-09 23:03:42 +053066 "kernelheader_size=0x40000\0" \
Udit Agarwal3fba2312020-06-08 18:55:44 +053067 "bootm_size=0x10000000\0" \
Rajesh Bhagata81357a2017-11-30 16:44:38 +053068 "console=ttyS0,115200\0" \
69 BOOTENV \
70 "boot_scripts=ls1012ardb_boot.scr\0" \
Vinitha Pillai-B57223c883f352018-01-09 23:03:42 +053071 "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \
Rajesh Bhagata81357a2017-11-30 16:44:38 +053072 "scan_dev_for_boot_part=" \
73 "part list ${devtype} ${devnum} devplist; " \
74 "env exists devplist || setenv devplist 1; " \
75 "for distro_bootpart in ${devplist}; do " \
76 "if fstype ${devtype} " \
77 "${devnum}:${distro_bootpart} " \
78 "bootfstype; then " \
79 "run scan_dev_for_boot; " \
80 "fi; " \
81 "done\0" \
Vinitha Pillai-B57223c883f352018-01-09 23:03:42 +053082 "boot_a_script=" \
83 "load ${devtype} ${devnum}:${distro_bootpart} " \
84 "${scriptaddr} ${prefix}${script}; " \
85 "env exists secureboot && load ${devtype} " \
86 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai78c58082019-04-23 05:52:17 +000087 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
88 "env exists secureboot " \
Vinitha Pillai-B57223c883f352018-01-09 23:03:42 +053089 "&& esbc_validate ${scripthdraddr};" \
90 "source ${scriptaddr}\0" \
Rajesh Bhagata81357a2017-11-30 16:44:38 +053091 "installer=load mmc 0:2 $load_addr " \
92 "/flex_installer_arm64.itb; " \
93 "bootm $load_addr#$board\0" \
Mian Yousaf Kaukab864c3db2021-04-14 12:33:58 +020094 "qspi_bootcmd=echo Trying load from qspi..;" \
Rajesh Bhagata81357a2017-11-30 16:44:38 +053095 "sf probe && sf read $load_addr " \
Vinitha Pillai-B57223c883f352018-01-09 23:03:42 +053096 "$kernel_addr $kernel_size; env exists secureboot " \
97 "&& sf read $kernelheader_addr_r $kernelheader_addr " \
98 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
99 "bootm $load_addr#$board\0"
Rajesh Bhagata81357a2017-11-30 16:44:38 +0530100
101#undef CONFIG_BOOTCOMMAND
Rajesh Bhagat1f6180d2018-11-05 18:02:53 +0000102#ifdef CONFIG_TFABOOT
103#undef QSPI_NOR_BOOTCOMMAND
Mian Yousaf Kaukab864c3db2021-04-14 12:33:58 +0200104#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\
Rajesh Bhagat1f6180d2018-11-05 18:02:53 +0000105 "env exists secureboot && esbc_halt;"
106#else
Mian Yousaf Kaukab864c3db2021-04-14 12:33:58 +0200107#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\
Vinitha Pillai-B57223c883f352018-01-09 23:03:42 +0530108 "env exists secureboot && esbc_halt;"
Rajesh Bhagat1f6180d2018-11-05 18:02:53 +0000109#endif
Vinitha Pillai-B5722311d14bf2017-03-23 13:48:20 +0530110
111#include <asm/fsl_secure_boot.h>
112
Prabhakar Kushwaha3b6e3892016-06-03 18:41:35 +0530113#endif /* __LS1012ARDB_H__ */