Anup Patel | 3fda026 | 2019-02-25 08:15:19 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (c) 2019 Western Digital Corporation or its affiliates. |
| 4 | * |
| 5 | * Authors: |
| 6 | * Anup Patel <anup.patel@wdc.com> |
| 7 | */ |
| 8 | |
Anup Patel | 3fda026 | 2019-02-25 08:15:19 +0000 | [diff] [blame] | 9 | #include <dm.h> |
Simon Glass | 0914011 | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 10 | #include <env.h> |
Simon Glass | 691d719 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 11 | #include <init.h> |
Pragnesh Patel | 88eec61 | 2020-05-29 11:33:22 +0530 | [diff] [blame] | 12 | #include <log.h> |
Jagan Teki | 868e295 | 2020-07-15 15:38:58 +0530 | [diff] [blame^] | 13 | #include <linux/bitops.h> |
Simon Glass | eb41d8a | 2020-05-10 11:40:08 -0600 | [diff] [blame] | 14 | #include <linux/bug.h> |
Anup Patel | 9f2a0c0 | 2019-06-25 06:31:44 +0000 | [diff] [blame] | 15 | #include <linux/delay.h> |
| 16 | #include <linux/io.h> |
Pragnesh Patel | 88eec61 | 2020-05-29 11:33:22 +0530 | [diff] [blame] | 17 | #include <misc.h> |
Pragnesh Patel | 01cdef2 | 2020-05-29 11:33:35 +0530 | [diff] [blame] | 18 | #include <spl.h> |
Pragnesh Patel | 5ce5020 | 2020-05-29 12:14:51 +0530 | [diff] [blame] | 19 | #include <asm/arch/cache.h> |
Pragnesh Patel | 88eec61 | 2020-05-29 11:33:22 +0530 | [diff] [blame] | 20 | |
| 21 | /* |
| 22 | * This define is a value used for error/unknown serial. |
| 23 | * If we really care about distinguishing errors and 0 is |
| 24 | * valid, we'll need a different one. |
| 25 | */ |
| 26 | #define ERROR_READING_SERIAL_NUMBER 0 |
Anup Patel | 9f2a0c0 | 2019-06-25 06:31:44 +0000 | [diff] [blame] | 27 | |
| 28 | #ifdef CONFIG_MISC_INIT_R |
| 29 | |
Pragnesh Patel | 88eec61 | 2020-05-29 11:33:22 +0530 | [diff] [blame] | 30 | #if CONFIG_IS_ENABLED(SIFIVE_OTP) |
| 31 | static u32 otp_read_serialnum(struct udevice *dev) |
Anup Patel | 9f2a0c0 | 2019-06-25 06:31:44 +0000 | [diff] [blame] | 32 | { |
| 33 | int ret; |
| 34 | u32 serial[2] = {0}; |
| 35 | |
| 36 | for (int i = 0xfe * 4; i > 0; i -= 8) { |
Pragnesh Patel | 88eec61 | 2020-05-29 11:33:22 +0530 | [diff] [blame] | 37 | ret = misc_read(dev, i, serial, sizeof(serial)); |
| 38 | |
| 39 | if (ret != sizeof(serial)) { |
| 40 | printf("%s: error reading serial from OTP\n", __func__); |
Anup Patel | 9f2a0c0 | 2019-06-25 06:31:44 +0000 | [diff] [blame] | 41 | break; |
| 42 | } |
Pragnesh Patel | 88eec61 | 2020-05-29 11:33:22 +0530 | [diff] [blame] | 43 | |
Anup Patel | 9f2a0c0 | 2019-06-25 06:31:44 +0000 | [diff] [blame] | 44 | if (serial[0] == ~serial[1]) |
| 45 | return serial[0]; |
| 46 | } |
| 47 | |
Pragnesh Patel | 88eec61 | 2020-05-29 11:33:22 +0530 | [diff] [blame] | 48 | return ERROR_READING_SERIAL_NUMBER; |
| 49 | } |
| 50 | #endif |
| 51 | |
| 52 | static u32 fu540_read_serialnum(void) |
| 53 | { |
| 54 | u32 serial = ERROR_READING_SERIAL_NUMBER; |
| 55 | |
| 56 | #if CONFIG_IS_ENABLED(SIFIVE_OTP) |
| 57 | struct udevice *dev; |
| 58 | int ret; |
| 59 | |
| 60 | /* init OTP */ |
| 61 | ret = uclass_get_device_by_driver(UCLASS_MISC, |
| 62 | DM_GET_DRIVER(sifive_otp), &dev); |
| 63 | |
| 64 | if (ret) { |
| 65 | debug("%s: could not find otp device\n", __func__); |
| 66 | return serial; |
| 67 | } |
| 68 | |
| 69 | /* read serial from OTP and set env var */ |
| 70 | serial = otp_read_serialnum(dev); |
| 71 | #endif |
| 72 | |
| 73 | return serial; |
Anup Patel | 9f2a0c0 | 2019-06-25 06:31:44 +0000 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | static void fu540_setup_macaddr(u32 serialnum) |
| 77 | { |
| 78 | /* Default MAC address */ |
| 79 | unsigned char mac[6] = { 0x70, 0xb3, 0xd5, 0x92, 0xf0, 0x00 }; |
| 80 | |
| 81 | /* |
| 82 | * We derive our board MAC address by ORing last three bytes |
| 83 | * of board serial number to above default MAC address. |
| 84 | * |
| 85 | * This logic of deriving board MAC address is taken from |
| 86 | * SiFive FSBL and is kept unchanged. |
| 87 | */ |
| 88 | mac[5] |= (serialnum >> 0) & 0xff; |
| 89 | mac[4] |= (serialnum >> 8) & 0xff; |
| 90 | mac[3] |= (serialnum >> 16) & 0xff; |
| 91 | |
| 92 | /* Update environment variable */ |
| 93 | eth_env_set_enetaddr("ethaddr", mac); |
| 94 | } |
| 95 | |
| 96 | int misc_init_r(void) |
| 97 | { |
Sagar Shrikant Kadam | cba0635 | 2019-08-12 07:57:40 -0700 | [diff] [blame] | 98 | u32 serial_num; |
| 99 | char buf[9] = {0}; |
Anup Patel | 9f2a0c0 | 2019-06-25 06:31:44 +0000 | [diff] [blame] | 100 | |
Sagar Shrikant Kadam | cba0635 | 2019-08-12 07:57:40 -0700 | [diff] [blame] | 101 | /* Set ethaddr environment variable from board serial number */ |
| 102 | if (!env_get("serial#")) { |
| 103 | serial_num = fu540_read_serialnum(); |
| 104 | if (!serial_num) { |
| 105 | WARN(true, "Board serial number should not be 0 !!\n"); |
| 106 | return 0; |
| 107 | } |
| 108 | snprintf(buf, sizeof(buf), "%08x", serial_num); |
| 109 | env_set("serial#", buf); |
| 110 | fu540_setup_macaddr(serial_num); |
| 111 | } |
Anup Patel | 9f2a0c0 | 2019-06-25 06:31:44 +0000 | [diff] [blame] | 112 | return 0; |
| 113 | } |
| 114 | |
| 115 | #endif |
Anup Patel | 3fda026 | 2019-02-25 08:15:19 +0000 | [diff] [blame] | 116 | |
| 117 | int board_init(void) |
| 118 | { |
Pragnesh Patel | 5ce5020 | 2020-05-29 12:14:51 +0530 | [diff] [blame] | 119 | int ret; |
| 120 | |
| 121 | /* enable all cache ways */ |
| 122 | ret = cache_enable_ways(); |
| 123 | if (ret) { |
| 124 | debug("%s: could not enable cache ways\n", __func__); |
| 125 | return ret; |
| 126 | } |
Anup Patel | 3fda026 | 2019-02-25 08:15:19 +0000 | [diff] [blame] | 127 | |
| 128 | return 0; |
| 129 | } |
Pragnesh Patel | 01cdef2 | 2020-05-29 11:33:35 +0530 | [diff] [blame] | 130 | |
| 131 | #ifdef CONFIG_SPL |
Jagan Teki | 868e295 | 2020-07-15 15:38:58 +0530 | [diff] [blame^] | 132 | #define MODE_SELECT_REG 0x1000 |
| 133 | #define MODE_SELECT_QSPI 0x6 |
| 134 | #define MODE_SELECT_SD 0xb |
| 135 | #define MODE_SELECT_MASK GENMASK(3, 0) |
| 136 | |
Pragnesh Patel | 01cdef2 | 2020-05-29 11:33:35 +0530 | [diff] [blame] | 137 | u32 spl_boot_device(void) |
| 138 | { |
Jagan Teki | 868e295 | 2020-07-15 15:38:58 +0530 | [diff] [blame^] | 139 | u32 mode_select = readl((void *)MODE_SELECT_REG); |
| 140 | u32 boot_device = mode_select & MODE_SELECT_MASK; |
| 141 | |
| 142 | switch (boot_device) { |
| 143 | case MODE_SELECT_QSPI: |
| 144 | return BOOT_DEVICE_SPI; |
| 145 | case MODE_SELECT_SD: |
| 146 | return BOOT_DEVICE_MMC1; |
| 147 | default: |
| 148 | debug("Unsupported boot device 0x%x but trying MMC1\n", |
| 149 | boot_device); |
| 150 | return BOOT_DEVICE_MMC1; |
| 151 | } |
Pragnesh Patel | 01cdef2 | 2020-05-29 11:33:35 +0530 | [diff] [blame] | 152 | } |
| 153 | #endif |
| 154 | |
| 155 | #ifdef CONFIG_SPL_LOAD_FIT |
| 156 | int board_fit_config_name_match(const char *name) |
| 157 | { |
| 158 | /* boot using first FIT config */ |
| 159 | return 0; |
| 160 | } |
| 161 | #endif |