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Gururaja Hebbar K R535cfa42008-08-25 11:30:29 +02001/*
2 * (C) Copyright 2008
3 * Gururaja Hebbar gururajakr@sanyo.co.in
4 *
5 * reference linux-2.6.20.6/drivers/rtc/rtc-pl031.c
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <command.h>
28#include <rtc.h>
29
30#if defined(CONFIG_CMD_DATE)
31
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020032#ifndef CONFIG_SYS_RTC_PL031_BASE
33#error CONFIG_SYS_RTC_PL031_BASE is not defined!
Gururaja Hebbar K R535cfa42008-08-25 11:30:29 +020034#endif
35
36/*
37 * Register definitions
38 */
39#define RTC_DR 0x00 /* Data read register */
40#define RTC_MR 0x04 /* Match register */
41#define RTC_LR 0x08 /* Data load register */
42#define RTC_CR 0x0c /* Control register */
43#define RTC_IMSC 0x10 /* Interrupt mask and set register */
44#define RTC_RIS 0x14 /* Raw interrupt status register */
45#define RTC_MIS 0x18 /* Masked interrupt status register */
46#define RTC_ICR 0x1c /* Interrupt clear register */
47
48#define RTC_CR_START (1 << 0)
49
50#define RTC_WRITE_REG(addr, val) \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020051 (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE + (addr)) = (val))
Gururaja Hebbar K R535cfa42008-08-25 11:30:29 +020052#define RTC_READ_REG(addr) \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053 (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE + (addr)))
Gururaja Hebbar K R535cfa42008-08-25 11:30:29 +020054
55static int pl031_initted = 0;
56
57/* Enable RTC Start in Control register*/
58void rtc_init(void)
59{
60 RTC_WRITE_REG(RTC_CR, RTC_CR_START);
61
62 pl031_initted = 1;
63}
64
65/*
66 * Reset the RTC. We set the date back to 1970-01-01.
67 */
68void rtc_reset(void)
69{
70 RTC_WRITE_REG(RTC_LR, 0x00);
71 if(!pl031_initted)
72 rtc_init();
73}
74
75/*
76 * Set the RTC
77*/
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +020078int rtc_set(struct rtc_time *tmp)
Gururaja Hebbar K R535cfa42008-08-25 11:30:29 +020079{
80 unsigned long tim;
81
82 if(!pl031_initted)
83 rtc_init();
84
85 if (tmp == NULL) {
86 puts("Error setting the date/time\n");
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +020087 return -1;
Gururaja Hebbar K R535cfa42008-08-25 11:30:29 +020088 }
89
90 /* Calculate number of seconds this incoming time represents */
91 tim = mktime(tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
92 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
93
94 RTC_WRITE_REG(RTC_LR, tim);
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +020095
96 return -1;
Gururaja Hebbar K R535cfa42008-08-25 11:30:29 +020097}
98
99/*
100 * Get the current time from the RTC
101 */
102int rtc_get(struct rtc_time *tmp)
103{
104 ulong tim;
105
106 if(!pl031_initted)
107 rtc_init();
108
109 if (tmp == NULL) {
110 puts("Error getting the date/time\n");
111 return -1;
112 }
113
114 tim = RTC_READ_REG(RTC_DR);
115
116 to_tm (tim, tmp);
117
118 debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
119 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
120 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
121
122 return 0;
123}
124
125#endif