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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Masahiro Yamada78c627c2017-01-15 14:59:03 +09002/*
3 * Copyright (C) 2011-2014 Panasonic Corporation
4 * Copyright (C) 2015-2017 Socionext Inc.
Masahiro Yamada78c627c2017-01-15 14:59:03 +09005 */
6
Masahiro Yamada78c627c2017-01-15 14:59:03 +09007#include <spl.h>
8#include <linux/io.h>
9
10#include "../init.h"
11#include "../sc-regs.h"
12
Masahiro Yamada00aa4532017-08-13 09:01:13 +090013void uniphier_ld4_dram_clk_init(void)
Masahiro Yamada78c627c2017-01-15 14:59:03 +090014{
15 u32 tmp;
16
17 /* deassert reset */
Masahiro Yamada739ba412019-07-10 20:07:41 +090018 tmp = readl(sc_base + SC_RSTCTRL);
Masahiro Yamada78c627c2017-01-15 14:59:03 +090019 tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0;
Masahiro Yamada739ba412019-07-10 20:07:41 +090020 writel(tmp, sc_base + SC_RSTCTRL);
21 readl(sc_base + SC_RSTCTRL); /* dummy read */
Masahiro Yamada78c627c2017-01-15 14:59:03 +090022
23 /* provide clocks */
Masahiro Yamada739ba412019-07-10 20:07:41 +090024 tmp = readl(sc_base + SC_CLKCTRL);
Masahiro Yamada78c627c2017-01-15 14:59:03 +090025 tmp |= SC_CLKCTRL_CEN_UMC;
Masahiro Yamada739ba412019-07-10 20:07:41 +090026 writel(tmp, sc_base + SC_CLKCTRL);
27 readl(sc_base + SC_CLKCTRL); /* dummy read */
Masahiro Yamada78c627c2017-01-15 14:59:03 +090028}