blob: c7553208adeed6f85255f9c412c0ced2427f7d34 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glassd1de41d2015-08-03 08:19:37 -06002/*
3 * Google Spring board device tree source
4 *
5 * Copyright (c) 2013 Google, Inc
6 * Copyright (c) 2014 SUSE LINUX Products GmbH
Simon Glassd1de41d2015-08-03 08:19:37 -06007 */
8
9/dts-v1/;
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/input/input.h>
13#include "exynos5250.dtsi"
14
15/ {
16 model = "Google Spring";
17 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
18
19 aliases {
20 i2c0 = "/i2c@12C60000";
21 i2c1 = "/i2c@12C70000";
22 i2c2 = "/i2c@12C80000";
23 i2c3 = "/i2c@12C90000";
24 i2c4 = "/i2c@12CA0000";
25 i2c5 = "/i2c@12CB0000";
26 i2c6 = "/i2c@12CC0000";
27 i2c7 = "/i2c@12CD0000";
28 i2c104 = &cros_ec_ldo_tunnel;
29 spi0 = "/spi@12d20000";
30 spi1 = "/spi@12d30000";
31 spi2 = "/spi@12d40000";
32 spi3 = "/spi@131a0000";
33 spi4 = "/spi@131b0000";
Minkyu Kang972d8572018-07-27 16:59:24 +090034 mmc0 = "/mmc@12200000";
Simon Glassd1de41d2015-08-03 08:19:37 -060035 serial0 = "/serial@12C30000";
36 console = "/serial@12C30000";
Simon Glassd1de41d2015-08-03 08:19:37 -060037 };
38
39 memory {
40 reg = <0x40000000 0x80000000>;
41 };
42
Simon Glassf656dae2019-01-11 18:37:11 -070043 iram {
44 reg = <0x02020000 0x60000>;
45 };
46
47 config {
48 samsung,bl1-offset = <0x1400>;
49 samsung,bl2-offset = <0x3400>;
50 u-boot-memory = "/memory";
51 u-boot-offset = <0x3e00000 0x100000>;
52 };
53
Simon Glassd1de41d2015-08-03 08:19:37 -060054 flash@0 {
Simon Glassf656dae2019-01-11 18:37:11 -070055 reg = <0 0x100000>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58 pre-boot {
59 label = "bl1 pre-boot";
60 reg = <0 0x2000>;
61 read-only;
62 filename = "e5250.nbl1.bin";
63 type = "blob exynos-bl1";
64 required;
65 };
66
67 spl {
68 label = "bl2 spl";
69 reg = <0x2000 0x8000>;
70 read-only;
71 filename = "bl2.bin";
72 type = "blob exynos-bl2 boot,dtb";
73 payload = "/flash/ro-boot";
74 required;
75 };
76
77 ro-boot {
78 label = "u-boot";
79 reg = <0xa000 0xb0000>;
80 read-only;
81 type = "blob boot,dtb";
82 required;
Simon Glassd1de41d2015-08-03 08:19:37 -060083 };
84 };
85
86 chosen {
87 bootargs = "console=tty1";
88 stdout-path = "serial3:115200n8";
89 };
90
91 board-rev {
92 compatible = "google,board-revision";
93 google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
94 <&gpy4 2 0>;
95 };
96
Simon Glass6e474ea2015-08-22 18:31:37 -060097 i2c@12C90000 {
98 clock-frequency = <100000>;
99 tpm@20 {
100 reg = <0x20>;
101 compatible = "infineon,slb9645tt";
102 };
103 };
104
Simon Glassd1de41d2015-08-03 08:19:37 -0600105 mmc@12200000 {
106 samsung,bus-width = <8>;
107 samsung,timing = <1 3 3>;
108 samsung,removable = <0>;
109 };
110
111 mmc@12210000 {
112 status = "disabled";
113 };
114
115 mmc@12220000 {
116 /* MMC2 pins are used as GPIO for eDP bridge */
117 status = "disabled";
118 };
119
120 mmc@12230000 {
121 status = "disabled";
122 };
123
124 ehci@12110000 {
125 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
126 status = "okay";
127 };
128
129 xhci@12000000 {
130 samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
131 };
132
Simon Glass8d135f52019-01-11 18:37:10 -0700133 sound {
134 compatible = "google,spring-audio-max98088";
135
136 samsung,model = "Spring-I2S-MAX98088";
137 samsung,audio-codec = <&max98088>;
138 codec-enable-gpio = <&gpx1 7 0>;
139
140 cpu {
141 sound-dai = <&i2s1 0>;
142 };
143
144 codec {
145 sound-dai = <&max98088 0>;
146 };
147 };
148
Simon Glassd1de41d2015-08-03 08:19:37 -0600149 spi@12d30000 {
150 spi-max-frequency = <50000000>;
151 firmware_storage_spi: flash@0 {
152 compatible = "spi-flash";
153 reg = <0>;
154 };
155 };
156
157 tmu@10060000 {
158 samsung,min-temp = <25>;
159 samsung,max-temp = <125>;
160 samsung,start-warning = <95>;
161 samsung,start-tripping = <105>;
162 samsung,hw-tripping = <110>;
163 samsung,efuse-min-value = <40>;
164 samsung,efuse-value = <55>;
165 samsung,efuse-max-value = <100>;
166 samsung,slope = <274761730>;
167 samsung,dc-value = <25>;
168 };
169
170 fimd@14400000 {
171 samsung,vl-freq = <60>;
172 samsung,vl-col = <1366>;
173 samsung,vl-row = <768>;
174 samsung,vl-width = <1366>;
175 samsung,vl-height = <768>;
176
177 samsung,vl-clkp;
178 samsung,vl-dp;
179 samsung,vl-hsp;
180 samsung,vl-vsp;
181
182 samsung,vl-bpix = <4>;
183
184 samsung,vl-hspw = <32>;
185 samsung,vl-hbpd = <80>;
186 samsung,vl-hfpd = <48>;
187 samsung,vl-vspw = <5>;
188 samsung,vl-vbpd = <14>;
189 samsung,vl-vfpd = <3>;
190 samsung,vl-cmd-allow-len = <0xf>;
191
192 samsung,winid = <0>;
193 samsung,interface-mode = <1>;
194 samsung,dp-enabled = <1>;
195 samsung,dual-lcd-enabled = <0>;
196 };
197
198 dp@145b0000 {
199 samsung,lt-status = <0>;
200
201 samsung,master-mode = <0>;
202 samsung,bist-mode = <0>;
203 samsung,bist-pattern = <0>;
204 samsung,h-sync-polarity = <0>;
205 samsung,v-sync-polarity = <0>;
206 samsung,interlaced = <0>;
207 samsung,color-space = <0>;
208 samsung,dynamic-range = <0>;
209 samsung,ycbcr-coeff = <0>;
210 samsung,color-depth = <1>;
211 };
Simon Glassf948f5d2016-02-21 21:08:58 -0700212
213 backlight: backlight {
214 compatible = "pwm-backlight";
215 pwms = <&pwm 0 1000000 0>;
216 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
217 default-brightness-level = <1>;
218 enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
219 power-supply = <&fet1>;
220 };
221
222 panel: panel {
223 compatible = "auo,b116xw03";
224 power-supply = <&fet6>;
225 backlight = <&backlight>;
226
227 port {
228 panel_in: endpoint {
229 remote-endpoint = <&bridge_out>;
230 };
231 };
232 };
Simon Glassd1de41d2015-08-03 08:19:37 -0600233};
234
235&i2c_0 {
236 status = "okay";
237 samsung,i2c-sda-delay = <100>;
238 samsung,i2c-max-bus-freq = <378000>;
239
240 s5m8767-pmic@66 {
241 compatible = "samsung,s5m8767-pmic";
242 reg = <0x66>;
243 interrupt-parent = <&gpx3>;
244 wakeup-source;
245
246 s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
247 <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
248 <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
249
250 s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
251 <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
252 <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
253
254 /*
255 * The following arrays of DVS voltages are not used, since we are
256 * not using GPIOs to control PMIC bucks, but they must be defined
257 * to please the driver.
258 */
259 s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
260 <1250000>, <1200000>,
261 <1150000>, <1100000>,
262 <1000000>, <950000>;
263
264 s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
265 <1100000>, <1100000>,
266 <1000000>, <1000000>,
267 <1000000>, <1000000>;
268
269 s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
270 <1200000>, <1200000>,
271 <1200000>, <1200000>,
272 <1200000>, <1200000>;
273
274 clocks {
275 compatible = "samsung,s5m8767-clk";
276 #clock-cells = <1>;
277 clock-output-names = "en32khz_ap",
278 "en32khz_cp",
279 "en32khz_bt";
280 };
281
282 regulators {
283 ldo4_reg: LDO4 {
284 regulator-name = "P1.0V_LDO_OUT4";
285 regulator-min-microvolt = <1000000>;
286 regulator-max-microvolt = <1000000>;
287 regulator-always-on;
288 op_mode = <0>;
289 };
290
291 ldo5_reg: LDO5 {
292 regulator-name = "P1.8V_LDO_OUT5";
293 regulator-min-microvolt = <1800000>;
294 regulator-max-microvolt = <1800000>;
295 regulator-always-on;
296 op_mode = <0>;
297 };
298
299 ldo6_reg: LDO6 {
300 regulator-name = "vdd_mydp";
301 regulator-min-microvolt = <1200000>;
302 regulator-max-microvolt = <1200000>;
303 regulator-always-on;
304 op_mode = <3>;
305 };
306
307 ldo7_reg: LDO7 {
308 regulator-name = "P1.1V_LDO_OUT7";
309 regulator-min-microvolt = <1100000>;
310 regulator-max-microvolt = <1100000>;
311 regulator-always-on;
312 op_mode = <3>;
313 };
314
315 ldo8_reg: LDO8 {
316 regulator-name = "P1.0V_LDO_OUT8";
317 regulator-min-microvolt = <1000000>;
318 regulator-max-microvolt = <1000000>;
319 regulator-always-on;
320 op_mode = <3>;
321 };
322
323 ldo10_reg: LDO10 {
324 regulator-name = "P1.8V_LDO_OUT10";
325 regulator-min-microvolt = <1800000>;
326 regulator-max-microvolt = <1800000>;
327 regulator-always-on;
328 op_mode = <3>;
329 };
330
331 ldo11_reg: LDO11 {
332 regulator-name = "P1.8V_LDO_OUT11";
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <1800000>;
335 regulator-always-on;
336 op_mode = <0>;
337 };
338
339 ldo12_reg: LDO12 {
340 regulator-name = "P3.0V_LDO_OUT12";
341 regulator-min-microvolt = <3000000>;
342 regulator-max-microvolt = <3000000>;
343 regulator-always-on;
344 op_mode = <3>;
345 };
346
347 ldo13_reg: LDO13 {
348 regulator-name = "P1.8V_LDO_OUT13";
349 regulator-min-microvolt = <1800000>;
350 regulator-max-microvolt = <1800000>;
351 regulator-always-on;
352 op_mode = <0>;
353 };
354
355 ldo14_reg: LDO14 {
356 regulator-name = "P1.8V_LDO_OUT14";
357 regulator-min-microvolt = <1800000>;
358 regulator-max-microvolt = <1800000>;
359 regulator-always-on;
360 op_mode = <3>;
361 };
362
363 ldo15_reg: LDO15 {
364 regulator-name = "P1.0V_LDO_OUT15";
365 regulator-min-microvolt = <1000000>;
366 regulator-max-microvolt = <1000000>;
367 regulator-always-on;
368 op_mode = <3>;
369 };
370
371 ldo16_reg: LDO16 {
372 regulator-name = "P1.8V_LDO_OUT16";
373 regulator-min-microvolt = <1800000>;
374 regulator-max-microvolt = <1800000>;
375 regulator-always-on;
376 op_mode = <3>;
377 };
378
379 ldo17_reg: LDO17 {
380 regulator-name = "P1.2V_LDO_OUT17";
381 regulator-min-microvolt = <1200000>;
382 regulator-max-microvolt = <1200000>;
383 regulator-always-on;
384 op_mode = <0>;
385 };
386
387 ldo25_reg: LDO25 {
388 regulator-name = "vdd_bridge";
389 regulator-min-microvolt = <1200000>;
390 regulator-max-microvolt = <1200000>;
391 regulator-always-on;
392 op_mode = <1>;
393 };
394
395 buck1_reg: BUCK1 {
396 regulator-name = "vdd_mif";
397 regulator-min-microvolt = <950000>;
398 regulator-max-microvolt = <1300000>;
399 regulator-always-on;
400 regulator-boot-on;
401 op_mode = <3>;
402 };
403
404 buck2_reg: BUCK2 {
405 regulator-name = "vdd_arm";
406 regulator-min-microvolt = <850000>;
407 regulator-max-microvolt = <1350000>;
408 regulator-always-on;
409 regulator-boot-on;
410 op_mode = <3>;
411 };
412
413 buck3_reg: BUCK3 {
414 regulator-name = "vdd_int";
415 regulator-min-microvolt = <900000>;
416 regulator-max-microvolt = <1200000>;
417 regulator-always-on;
418 regulator-boot-on;
419 op_mode = <3>;
420 };
421
422 buck4_reg: BUCK4 {
423 regulator-name = "vdd_g3d";
424 regulator-min-microvolt = <850000>;
425 regulator-max-microvolt = <1300000>;
426 regulator-boot-on;
427 op_mode = <3>;
428 };
429
430 buck5_reg: BUCK5 {
431 regulator-name = "P1.8V_BUCK_OUT5";
432 regulator-min-microvolt = <1800000>;
433 regulator-max-microvolt = <1800000>;
434 regulator-always-on;
435 regulator-boot-on;
436 op_mode = <1>;
437 };
438
439 buck6_reg: BUCK6 {
440 regulator-name = "P1.2V_BUCK_OUT6";
441 regulator-min-microvolt = <2050000>;
442 regulator-max-microvolt = <2050000>;
443 regulator-always-on;
444 regulator-boot-on;
445 op_mode = <0>;
446 };
447
448 buck9_reg: BUCK9 {
449 regulator-name = "vdd_ummc";
450 regulator-min-microvolt = <950000>;
451 regulator-max-microvolt = <3000000>;
452 regulator-always-on;
453 regulator-boot-on;
454 op_mode = <3>;
455 };
456 };
457 };
458};
459
Simon Glassf948f5d2016-02-21 21:08:58 -0700460&dp {
461 status = "okay";
462 samsung,color-space = <0>;
463 samsung,dynamic-range = <0>;
464 samsung,ycbcr-coeff = <0>;
465 samsung,color-depth = <1>;
466 samsung,link-rate = <0x0a>;
467 samsung,lane-count = <1>;
468 samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
469
470 ports {
471 port@0 {
472 dp_out: endpoint {
473 remote-endpoint = <&bridge_in>;
474 };
475 };
476 };
477};
478
Simon Glassd1de41d2015-08-03 08:19:37 -0600479&i2c_1 {
480 status = "okay";
481 samsung,i2c-sda-delay = <100>;
482 samsung,i2c-max-bus-freq = <378000>;
483};
484
485&i2c_2 {
486 status = "okay";
487 samsung,i2c-sda-delay = <100>;
488 samsung,i2c-max-bus-freq = <66000>;
489};
490
491&i2c_3 {
492 status = "okay";
493 samsung,i2c-sda-delay = <100>;
494 samsung,i2c-max-bus-freq = <66000>;
495};
496
497&i2c_4 {
498 status = "okay";
499 samsung,i2c-sda-delay = <100>;
500 samsung,i2c-max-bus-freq = <66000>;
501 clock-frequency = <66000>;
502
503 cros_ec: embedded-controller {
504 compatible = "google,cros-ec-i2c";
505 reg = <0x1e>;
506 interrupts = <6 IRQ_TYPE_NONE>;
507 interrupt-parent = <&gpx1>;
508 wakeup-source;
509 u-boot,i2c-offset-len = <0>;
510 ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
511 cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
512 compatible = "google,cros-ec-ldo-tunnel";
513 #address-cells = <1>;
514 #size-cells = <0>;
515 power-regulator {
516 compatible = "ti,tps65090";
517 reg = <0x48>;
518
519 regulators {
520 dcdc1 {
521 ti,enable-ext-control;
522 };
523 dcdc2 {
524 ti,enable-ext-control;
525 };
526 dcdc3 {
527 ti,enable-ext-control;
528 };
529 fet1: fet1 {
530 regulator-name = "vcd_led";
531 ti,overcurrent-wait = <3>;
532 };
533 tps65090_fet2: fet2 {
534 regulator-name = "video_mid";
535 regulator-always-on;
536 ti,overcurrent-wait = <3>;
537 };
538 fet3 {
539 regulator-name = "wwan_r";
540 regulator-always-on;
541 ti,overcurrent-wait = <3>;
542 };
543 fet4 {
544 regulator-name = "sdcard";
545 ti,overcurrent-wait = <3>;
546 };
547 fet5 {
548 regulator-name = "camout";
549 regulator-always-on;
550 ti,overcurrent-wait = <3>;
551 };
552 fet6: fet6 {
553 regulator-name = "lcd_vdd";
554 ti,overcurrent-wait = <3>;
555 };
556 tps65090_fet7: fet7 {
557 regulator-name = "video_mid_1a";
558 regulator-always-on;
559 ti,overcurrent-wait = <3>;
560 };
561 ldo1 {
562 };
563 ldo2 {
564 };
565 };
566 };
567 };
568 };
569};
570
571&i2c_5 {
572 status = "okay";
573 samsung,i2c-sda-delay = <100>;
574 samsung,i2c-max-bus-freq = <66000>;
575};
576
577&i2c_7 {
578 status = "okay";
579 samsung,i2c-sda-delay = <100>;
580 samsung,i2c-max-bus-freq = <66000>;
581
582 ps8622-bridge@8 {
583 compatible = "parade,ps8622";
584 reg = <0x8>;
585 sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
586 reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
587 hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
588 power-supply = <&ldo6_reg>;
589 parade,regs = /bits/ 8 <
590 0x02 0xa1 0x01 /* HPD low */
591 /*
592 * SW setting: [1:0] SW output 1.2V voltage is
593 * lower to 96%
594 */
595 0x04 0x14 0x01
596 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
597 0x04 0xe3 0x20
598 0x04 0xe2 0x80 /* [7] RCO SS enable */
599 /*
600 * RPHY Setting: [3:2] CDR tune wait cycle before
601 * measure for fine tune b00: 1us,
602 * 01: 0.5us, 10:2us, 11:4us
603 */
604 0x04 0x8a 0x0c
605 0x04 0x89 0x08 /* [3] RFD always on */
606 /*
607 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
608 */
609 0x04 0x71 0x2d
610 /* 2.7G CDR settings */
611 0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
612 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
613 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
614 /*
615 * 1.62G CDR settings:
616 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
617 */
618 0x04 0xc0 0x12
619 0x04 0xc1 0x92 /* Gitune=-37% */
620 0x04 0xc2 0x1c /* Fbstep=100% */
621 0x04 0x32 0x80 /* [7] LOS signal disable */
622 /* RPIO Setting */
623 /* [7:4] LVDS driver bias current 75% (250mV swing) */
624 0x04 0x00 0xb0
625 /* [7:6] Right-bar GPIO output strength is 8mA */
626 0x04 0x15 0x40
627 /* EQ Training State Machine Setting */
628 0x04 0x54 0x10 /* RCO calibration start */
629 /* [4:0] MAX_LANE_COUNT set to one lane */
630 0x01 0x02 0x81
631 /* [4:0] LANE_COUNT_SET set to one lane */
632 0x01 0x21 0x81
633 0x00 0x52 0x20
634 0x00 0xf1 0x03 /* HPD CP toggle enable */
635 0x00 0x62 0x41
636 /* Counter number add 1ms counter delay */
637 0x00 0xf6 0x01
638 /*
639 * [6]PWM function control by DPCD0040f[7], default
640 * is PWM block always works
641 */
642 0x00 0x77 0x06
643 0x00 0x4c 0x04
644 /*
645 * 04h Adjust VTotal tolerance to fix the 30Hz no-
646 * display issue
647 * DPCD00400='h00 Parade OUI = 'h001cf8
648 */
649 0x01 0xc0 0x00
650 0x01 0xc1 0x1c /* DPCD00401='h1c */
651 0x01 0xc2 0xf8 /* DPCD00402='hf8 */
652 /* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
653 0x01 0xc3 0x44
654 0x01 0xc4 0x32 /* DPCD404 */
655 0x01 0xc5 0x53 /* DPCD405 */
656 0x01 0xc6 0x4c /* DPCD406 */
657 0x01 0xc7 0x56 /* DPCD407 */
658 0x01 0xc8 0x35 /* DPCD408 */
659 /* DPCD40A Initial Code major revision '01' */
660 0x01 0xca 0x01
661 /* DPCD40B Initial Code minor revision '05' */
662 0x01 0xcb 0x05
663 0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
664 /*
665 * 0xff for 100% PWM of brightness, 0h for 0% brightness
666 */
667 0x01 0xa7 0x00
668 /*
669 * Set LVDS output as 6bit-VESA mapping, single LVDS
670 * channel
671 */
672 0x01 0xcc 0x13
673 0x02 0xb1 0x20 /* Enable SSC set by register */
674 /* Set SSC enabled and +/-1% central spreading */
675 0x04 0x10 0x16
676 0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
677 0x04 0x54 0x14 /* LC -> RCO */
678 0x02 0xa1 0x91>; /* HPD high */
Simon Glassf948f5d2016-02-21 21:08:58 -0700679 ports {
680 port@0 {
681 bridge_out: endpoint {
682 remote-endpoint = <&panel_in>;
683 };
684 };
685
686 port@1 {
687 bridge_in: endpoint {
688 remote-endpoint = <&dp_out>;
689 };
690 };
691 };
Simon Glassd1de41d2015-08-03 08:19:37 -0600692 };
693
Simon Glass8d135f52019-01-11 18:37:10 -0700694 max98088: soundcodec@10 {
Simon Glass93a98a62018-12-10 10:37:44 -0700695 reg = <0x10>;
Simon Glass8d135f52019-01-11 18:37:10 -0700696 compatible = "maxim,max98088";
Simon Glass93a98a62018-12-10 10:37:44 -0700697 #sound-dai-cells = <1>;
Simon Glassd1de41d2015-08-03 08:19:37 -0600698 };
Simon Glassd1de41d2015-08-03 08:19:37 -0600699};
700
701#include "cros-ec-keyboard.dtsi"