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Masahiro Yamada4b0abf92014-10-03 19:21:03 +09001menu "NAND Device Support"
2
Masahiro Yamada65e41452014-11-13 20:31:50 +09003config SYS_NAND_SELF_INIT
4 bool
5 help
6 This option, if enabled, provides more flexible and linux-like
7 NAND initialization process.
8
Masahiro Yamada4b0abf92014-10-03 19:21:03 +09009config NAND_DENALI
10 bool "Support Denali NAND controller"
Masahiro Yamada65e41452014-11-13 20:31:50 +090011 select SYS_NAND_SELF_INIT
Masahiro Yamada4b0abf92014-10-03 19:21:03 +090012 help
13 Enable support for the Denali NAND controller.
14
15config SYS_NAND_DENALI_64BIT
16 bool "Use 64-bit variant of Denali NAND controller"
17 depends on NAND_DENALI
18 help
19 The Denali NAND controller IP has some variations in terms of
20 the bus interface. The DMA setup sequence is completely differenct
21 between 32bit / 64bit AXI bus variants.
22
23 If your Denali NAND controller is the 64-bit variant, say Y.
24 Otherwise (32 bit), say N.
25
26config NAND_DENALI_SPARE_AREA_SKIP_BYTES
27 int "Number of bytes skipped in OOB area"
28 depends on NAND_DENALI
29 range 0 63
30 help
31 This option specifies the number of bytes to skip from the beginning
32 of OOB area before last ECC sector data starts. This is potentially
33 used to preserve the bad block marker in the OOB area.
34
Stefan Agner55191942015-05-08 19:07:11 +020035config NAND_VF610_NFC
36 bool "Support for Freescale NFC for VF610/MPC5125"
37 select SYS_NAND_SELF_INIT
38 help
39 Enables support for NAND Flash Controller on some Freescale
40 processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
41 The driver supports a maximum 2k page size. The driver
42 currently does not support hardware ECC.
43
Stefan Agner080a71e2015-05-08 19:07:12 +020044choice
45 prompt "Hardware ECC strength"
46 depends on NAND_VF610_NFC
47 default SYS_NAND_VF610_NFC_45_ECC_BYTES
48 help
49 Select the ECC strength used in the hardware BCH ECC block.
50
51config SYS_NAND_VF610_NFC_45_ECC_BYTES
52 bool "24-error correction (45 ECC bytes)"
53
54config SYS_NAND_VF610_NFC_60_ECC_BYTES
55 bool "32-error correction (60 ECC bytes)"
56
57endchoice
58
Stefan Roese873960c2015-07-23 10:26:16 +020059config NAND_PXA3XX
60 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
61 select SYS_NAND_SELF_INIT
62 help
63 This enables the driver for the NAND flash device found on
64 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
65
Stefan Agner55191942015-05-08 19:07:11 +020066comment "Generic NAND options"
67
68# Enhance depends when converting drivers to Kconfig which use this config
69# option (mxc_nand, ndfc, omap_gpmc).
70config SYS_NAND_BUSWIDTH_16BIT
71 bool "Use 16-bit NAND interface"
72 depends on NAND_VF610_NFC
73 help
74 Indicates that NAND device has 16-bit wide data-bus. In absence of this
75 config, bus-width of NAND device is assumed to be either 8-bit and later
76 determined by reading ONFI params.
77 Above config is useful when NAND device's bus-width information cannot
78 be determined from on-chip ONFI params, like in following scenarios:
79 - SPL boot does not support reading of ONFI parameters. This is done to
80 keep SPL code foot-print small.
81 - In current U-Boot flow using nand_init(), driver initialization
82 happens in board_nand_init() which is called before any device probe
83 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
84 not available while configuring controller. So a static CONFIG_NAND_xx
85 is needed to know the device's bus-width in advance.
86
Masahiro Yamadae02ee252015-02-24 22:26:20 +090087if SPL
Masahiro Yamada845034e2014-10-03 19:21:04 +090088
89config SPL_NAND_DENALI
90 bool "Support Denali NAND controller for SPL"
91 help
92 This is a small implementation of the Denali NAND controller
93 for use on SPL.
94
Piotr Zierhoffer960caeb2015-07-23 14:33:03 +020095config SPL_NAND_SUNXI
96 bool "Support for NAND on Allwinner A20 in SPL"
97 depends on MACH_SUN7I
98 ---help---
99 Enable support for NAND. This option allows SPL to read from
100 sunxi NAND using DMA transfers.
101 Depending on the NAND chip, values like ECC strength and page sizes
102 have to be configured.
103
104config NAND_SUNXI_SPL_SYNDROME_PARTITIONS_END
105 hex "Size of syndrome partitions in sunxi NAND"
106 default 0x400000
107 depends on SPL_NAND_SUNXI
108 ---help---
109 End address for boot partitions on NAND. Those partitions have a
110 different random seed that has to match the sunxi BROM setting.
111
112config NAND_SUNXI_SPL_ECC_STRENGTH
113 int "ECC Strength for sunxi NAND"
114 default 40
115 depends on SPL_NAND_SUNXI
116 ---help---
117 ECC strength used by the sunxi NAND SPL driver. This is specific to the
118 chosen NAND chip and has to match the value used by the sunxi BROM.
119
120config NAND_SUNXI_SPL_ECC_PAGE_SIZE
121 hex "ECC page size for sunxi NAND"
122 default 0x400
123 depends on SPL_NAND_SUNXI
124 ---help---
125 ECC page size used by the sunxi NAND SPL driver for syndrome partitions.
126 This setting has to match the value used by the sunxi BROM.
127
128config NAND_SUNXI_SPL_PAGE_SIZE
129 hex "Page size for sunxi NAND"
130 default 0x2000
131 depends on SPL_NAND_SUNXI
132 ---help---
133 Page size of the NAND flash used by the sunxi NAND SPL driver. This is
134 specific to the chosen NAND chip.
Masahiro Yamada845034e2014-10-03 19:21:04 +0900135endif
136
Masahiro Yamada4b0abf92014-10-03 19:21:03 +0900137endmenu