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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk38635852002-08-27 05:55:31 +00002/*
3 * (C) Copyright 2000
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenk38635852002-08-27 05:55:31 +00005 */
6
7/*
8 * Cache support: switch on or off, get status
9 */
10#include <common.h>
11#include <command.h>
Simon Glass9edefc22019-11-14 12:57:37 -070012#include <cpu_func.h>
Matthew McClintockd0c4c332011-05-24 10:09:05 +000013#include <linux/compiler.h>
wdenk38635852002-08-27 05:55:31 +000014
Matthew McClintockd0c4c332011-05-24 10:09:05 +000015static int parse_argv(const char *);
16
Stefan Kristiansson23498932011-10-31 18:21:12 +000017void __weak invalidate_icache_all(void)
Matthew McClintockd0c4c332011-05-24 10:09:05 +000018{
Stefan Kristiansson23498932011-10-31 18:21:12 +000019 /* please define arch specific invalidate_icache_all */
20 puts("No arch specific invalidate_icache_all available!\n");
Matthew McClintockd0c4c332011-05-24 10:09:05 +000021}
wdenk38635852002-08-27 05:55:31 +000022
Patrice Chotardc2a21232020-04-28 11:38:03 +020023__weak void noncached_set_region(void)
24{
25}
26
Simon Glass09140112020-05-10 11:40:03 -060027static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc,
28 char *const argv[])
wdenk38635852002-08-27 05:55:31 +000029{
30 switch (argc) {
Eric Perief043dc22019-07-13 14:54:58 -040031 case 2: /* on / off / flush */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000032 switch (parse_argv(argv[1])) {
Joe Hershbergere9455fc2012-10-03 10:56:16 +000033 case 0:
34 icache_disable();
wdenk38635852002-08-27 05:55:31 +000035 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000036 case 1:
37 icache_enable();
wdenk38635852002-08-27 05:55:31 +000038 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000039 case 2:
40 invalidate_icache_all();
Matthew McClintockd0c4c332011-05-24 10:09:05 +000041 break;
Eric Perief043dc22019-07-13 14:54:58 -040042 default:
43 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000044 }
Joe Hershberger36180d92012-10-03 10:56:17 +000045 break;
wdenk38635852002-08-27 05:55:31 +000046 case 1: /* get status */
Joe Hershbergere9455fc2012-10-03 10:56:16 +000047 printf("Instruction Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000048 icache_status() ? "ON" : "OFF");
49 return 0;
50 default:
Simon Glass4c12eeb2011-12-10 08:44:01 +000051 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000052 }
53 return 0;
54}
55
Stefan Kristiansson23498932011-10-31 18:21:12 +000056void __weak flush_dcache_all(void)
Matthew McClintockd0c4c332011-05-24 10:09:05 +000057{
Stefan Kristiansson23498932011-10-31 18:21:12 +000058 puts("No arch specific flush_dcache_all available!\n");
59 /* please define arch specific flush_dcache_all */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000060}
61
Simon Glass09140112020-05-10 11:40:03 -060062static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc,
63 char *const argv[])
wdenk38635852002-08-27 05:55:31 +000064{
65 switch (argc) {
Eric Perief043dc22019-07-13 14:54:58 -040066 case 2: /* on / off / flush */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000067 switch (parse_argv(argv[1])) {
Joe Hershbergere9455fc2012-10-03 10:56:16 +000068 case 0:
69 dcache_disable();
wdenk38635852002-08-27 05:55:31 +000070 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000071 case 1:
72 dcache_enable();
Patrice Chotardc2a21232020-04-28 11:38:03 +020073 noncached_set_region();
wdenk38635852002-08-27 05:55:31 +000074 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000075 case 2:
76 flush_dcache_all();
Matthew McClintockd0c4c332011-05-24 10:09:05 +000077 break;
Eric Perief043dc22019-07-13 14:54:58 -040078 default:
79 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000080 }
Joe Hershbergere9455fc2012-10-03 10:56:16 +000081 break;
wdenk38635852002-08-27 05:55:31 +000082 case 1: /* get status */
Joe Hershbergere9455fc2012-10-03 10:56:16 +000083 printf("Data (writethrough) Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000084 dcache_status() ? "ON" : "OFF");
85 return 0;
86 default:
Simon Glass4c12eeb2011-12-10 08:44:01 +000087 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000088 }
89 return 0;
wdenk38635852002-08-27 05:55:31 +000090}
91
Matthew McClintockd0c4c332011-05-24 10:09:05 +000092static int parse_argv(const char *s)
wdenk38635852002-08-27 05:55:31 +000093{
Joe Hershbergere9455fc2012-10-03 10:56:16 +000094 if (strcmp(s, "flush") == 0)
95 return 2;
96 else if (strcmp(s, "on") == 0)
97 return 1;
98 else if (strcmp(s, "off") == 0)
99 return 0;
100
101 return -1;
wdenk38635852002-08-27 05:55:31 +0000102}
103
wdenk8bde7f72003-06-27 21:31:46 +0000104
wdenk0d498392003-07-01 21:06:45 +0000105U_BOOT_CMD(
106 icache, 2, 1, do_icache,
Peter Tyser2fb26042009-01-27 18:03:12 -0600107 "enable or disable instruction cache",
Matthew McClintockd0c4c332011-05-24 10:09:05 +0000108 "[on, off, flush]\n"
109 " - enable, disable, or flush instruction cache"
wdenk8bde7f72003-06-27 21:31:46 +0000110);
111
wdenk0d498392003-07-01 21:06:45 +0000112U_BOOT_CMD(
113 dcache, 2, 1, do_dcache,
Peter Tyser2fb26042009-01-27 18:03:12 -0600114 "enable or disable data cache",
Matthew McClintockd0c4c332011-05-24 10:09:05 +0000115 "[on, off, flush]\n"
116 " - enable, disable, or flush data (writethrough) cache"
wdenk8bde7f72003-06-27 21:31:46 +0000117);