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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 87c1a4130c30e9b1af5d76026f3cc93192eb5cb3 / . / test / dm / clk.c
blob: f48de05436bf2abcb6546b5dfce9a33276fc3784 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]2/*
3 * Copyright (C) 2015 Google, Inc
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]4 */
5
6#include <common.h>
Jagan Tekid7a672e2019-03-05 19:42:44 +0530[diff] [blame]7#include <clk.h>
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]8#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -0600[diff] [blame]9#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -0700[diff] [blame]10#include <malloc.h>
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]11#include <asm/clk.h>
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]12#include <dm/test.h>
Jean-Jacques Hiblotdd2e0ce2019-10-22 14:00:05 +0200[diff] [blame]13#include <dm/device-internal.h>
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]14#include <linux/err.h>
Simon Glass0e1fad42020-07-19 10:15:37 -0600[diff] [blame]15#include <test/test.h>
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]16#include <test/ut.h>
17
Jagan Tekid7a672e2019-03-05 19:42:44 +0530[diff] [blame]18/* Base test of the clk uclass */
19static int dm_test_clk_base(struct unit_test_state *uts)
20{
21 struct udevice *dev;
22 struct clk clk_method1;
23 struct clk clk_method2;
24
25 /* Get the device using the clk device */
26 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &dev));
27
28 /* Get the same clk port in 2 different ways and compare */
Samuel Holland2050f822023-01-21 18:02:51 -0600[diff] [blame]29 ut_assertok(clk_get_by_index(dev, 0, &clk_method1));
30 ut_assertok(clk_get_by_name(dev, NULL, &clk_method2));
31 ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
32 ut_asserteq(clk_method1.id, clk_method2.id);
33
Jagan Tekid7a672e2019-03-05 19:42:44 +0530[diff] [blame]34 ut_assertok(clk_get_by_index(dev, 1, &clk_method1));
35 ut_assertok(clk_get_by_index_nodev(dev_ofnode(dev), 1, &clk_method2));
Sekhar Noriacbb7cd2019-08-01 19:12:55 +0530[diff] [blame]36 ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
Jagan Tekid7a672e2019-03-05 19:42:44 +0530[diff] [blame]37 ut_asserteq(clk_method1.id, clk_method2.id);
38
39 return 0;
40}
41
Simon Glasse180c2b2020-07-28 19:41:12 -0600[diff] [blame]42DM_TEST(dm_test_clk_base, UT_TESTF_SCAN_FDT);
Jagan Tekid7a672e2019-03-05 19:42:44 +0530[diff] [blame]43
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]44static int dm_test_clk(struct unit_test_state *uts)
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]45{
Anup Patelb630d572019-02-25 08:14:55 +0000[diff] [blame]46 struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test;
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]47 ulong rate;
48
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]49 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed",
50 &dev_fixed));
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]51
Anup Patelb630d572019-02-25 08:14:55 +0000[diff] [blame]52 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor",
53 &dev_fixed_factor));
54
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]55 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
56 &dev_clk));
57 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
58 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
59 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
60 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]61
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]62 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
63 &dev_test));
64 ut_assertok(sandbox_clk_test_get(dev_test));
Jean-Jacques Hiblotdd2e0ce2019-10-22 14:00:05 +0200[diff] [blame]65 ut_assertok(sandbox_clk_test_devm_get(dev_test));
Fabrice Gasnier1fe243a2018-07-24 16:31:28 +0200[diff] [blame]66 ut_assertok(sandbox_clk_test_valid(dev_test));
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]67
Jean-Jacques Hiblotdd2e0ce2019-10-22 14:00:05 +0200[diff] [blame]68 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
69 SANDBOX_CLK_TEST_ID_DEVM_NULL));
70 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
71 SANDBOX_CLK_TEST_ID_DEVM_NULL,
72 0));
73 ut_asserteq(0, sandbox_clk_test_enable(dev_test,
74 SANDBOX_CLK_TEST_ID_DEVM_NULL));
75 ut_asserteq(0, sandbox_clk_test_disable(dev_test,
76 SANDBOX_CLK_TEST_ID_DEVM_NULL));
77
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]78 ut_asserteq(1234,
79 sandbox_clk_test_get_rate(dev_test,
80 SANDBOX_CLK_TEST_ID_FIXED));
81 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
82 SANDBOX_CLK_TEST_ID_SPI));
83 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
84 SANDBOX_CLK_TEST_ID_I2C));
Jean-Jacques Hiblot9a52be12019-10-22 14:00:07 +0200[diff] [blame]85 ut_asserteq(321, sandbox_clk_test_get_rate(dev_test,
86 SANDBOX_CLK_TEST_ID_DEVM1));
Jean-Jacques Hiblotdd2e0ce2019-10-22 14:00:05 +0200[diff] [blame]87 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
88 SANDBOX_CLK_TEST_ID_DEVM2));
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]89
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]90 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED,
91 12345);
92 ut_assert(IS_ERR_VALUE(rate));
93 rate = sandbox_clk_test_get_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED);
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]94 ut_asserteq(1234, rate);
95
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]96 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
97 SANDBOX_CLK_TEST_ID_SPI,
98 1000));
99 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
100 SANDBOX_CLK_TEST_ID_I2C,
101 2000));
102
103 ut_asserteq(1000, sandbox_clk_test_get_rate(dev_test,
104 SANDBOX_CLK_TEST_ID_SPI));
105 ut_asserteq(2000, sandbox_clk_test_get_rate(dev_test,
106 SANDBOX_CLK_TEST_ID_I2C));
107
108 ut_asserteq(1000, sandbox_clk_test_set_rate(dev_test,
109 SANDBOX_CLK_TEST_ID_SPI,
110 10000));
111 ut_asserteq(2000, sandbox_clk_test_set_rate(dev_test,
112 SANDBOX_CLK_TEST_ID_I2C,
113 20000));
114
115 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
116 ut_assert(IS_ERR_VALUE(rate));
117 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
118 ut_assert(IS_ERR_VALUE(rate));
119
120 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
121 SANDBOX_CLK_TEST_ID_SPI));
122 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
123 SANDBOX_CLK_TEST_ID_I2C));
124
Dario Binacchi2983ad52020-12-30 00:06:31 +0100[diff] [blame]125 ut_asserteq(5000, sandbox_clk_test_round_rate(dev_test,
126 SANDBOX_CLK_TEST_ID_SPI,
127 5000));
128 ut_asserteq(7000, sandbox_clk_test_round_rate(dev_test,
129 SANDBOX_CLK_TEST_ID_I2C,
130 7000));
131
132 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
133 SANDBOX_CLK_TEST_ID_SPI));
134 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
135 SANDBOX_CLK_TEST_ID_I2C));
136
137 rate = sandbox_clk_test_round_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
138 ut_assert(IS_ERR_VALUE(rate));
139 rate = sandbox_clk_test_round_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
140 ut_assert(IS_ERR_VALUE(rate));
141
142 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
143 SANDBOX_CLK_TEST_ID_SPI));
144 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
145 SANDBOX_CLK_TEST_ID_I2C));
146
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]147 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
148 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
149 ut_asserteq(10000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
150 ut_asserteq(20000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
151
152 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_SPI));
153 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
154 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
155
156 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_I2C));
157 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
158 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
159
160 ut_assertok(sandbox_clk_test_disable(dev_test,
161 SANDBOX_CLK_TEST_ID_SPI));
162 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
163 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
164
165 ut_assertok(sandbox_clk_test_disable(dev_test,
166 SANDBOX_CLK_TEST_ID_I2C));
167 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
168 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
169
Jean-Jacques Hiblotdd2e0ce2019-10-22 14:00:05 +0200[diff] [blame]170 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
171 SANDBOX_CLK_ID_SPI));
172 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
173 SANDBOX_CLK_ID_I2C));
174 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
175 SANDBOX_CLK_ID_UART2));
Stephen Warren135aa952016-06-17 09:44:00 -0600[diff] [blame]176 ut_assertok(sandbox_clk_test_free(dev_test));
Jean-Jacques Hiblotdd2e0ce2019-10-22 14:00:05 +0200[diff] [blame]177 ut_asserteq(0, sandbox_clk_query_requested(dev_clk,
178 SANDBOX_CLK_ID_SPI));
179 ut_asserteq(0, sandbox_clk_query_requested(dev_clk,
180 SANDBOX_CLK_ID_I2C));
181 ut_asserteq(0, sandbox_clk_query_requested(dev_clk,
182 SANDBOX_CLK_ID_UART2));
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]183
Jean-Jacques Hiblotdd2e0ce2019-10-22 14:00:05 +0200[diff] [blame]184 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
185 SANDBOX_CLK_ID_UART1));
186 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
187 ut_asserteq(0, sandbox_clk_query_requested(dev_clk,
188 SANDBOX_CLK_ID_UART1));
Simon Glass6a1c7ce2015-07-06 12:54:24 -0600[diff] [blame]189 return 0;
190}
Simon Glasse180c2b2020-07-28 19:41:12 -0600[diff] [blame]191DM_TEST(dm_test_clk, UT_TESTF_SCAN_FDT);
Neil Armstrong65388d02018-04-03 11:44:19 +0200[diff] [blame]192
193static int dm_test_clk_bulk(struct unit_test_state *uts)
194{
195 struct udevice *dev_clk, *dev_test;
196
197 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
198 &dev_clk));
199 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
200 &dev_test));
201 ut_assertok(sandbox_clk_test_get_bulk(dev_test));
202
203 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
204 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
205
206 /* Fixed clock does not support enable, thus should not fail */
207 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
208 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
209 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
210
211 /* Fixed clock does not support disable, thus should not fail */
212 ut_assertok(sandbox_clk_test_disable_bulk(dev_test));
213 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
214 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
215
216 /* Fixed clock does not support enable, thus should not fail */
217 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
218 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
219 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
220
221 /* Fixed clock does not support disable, thus should not fail */
222 ut_assertok(sandbox_clk_test_release_bulk(dev_test));
223 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
224 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
Jean-Jacques Hiblotdd2e0ce2019-10-22 14:00:05 +0200[diff] [blame]225 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
Neil Armstrong65388d02018-04-03 11:44:19 +0200[diff] [blame]226
227 return 0;
228}
Simon Glasse180c2b2020-07-28 19:41:12 -0600[diff] [blame]229DM_TEST(dm_test_clk_bulk, UT_TESTF_SCAN_FDT);