Tom Rini | 4549e78 | 2018-05-06 18:27:01 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2018, STMicroelectronics - All Rights Reserved |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
| 8 | #include <errno.h> |
| 9 | #include <i2c.h> |
Patrick Delaunay | 8811583e | 2019-02-04 11:26:19 +0100 | [diff] [blame^] | 10 | #include <sysreset.h> |
| 11 | #include <dm/device.h> |
| 12 | #include <dm/lists.h> |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 13 | #include <power/pmic.h> |
Patrick Delaunay | d46c22b | 2019-02-04 11:26:16 +0100 | [diff] [blame] | 14 | #include <power/stpmic1.h> |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 15 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 16 | #define STPMIC1_NUM_OF_REGS 0x100 |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 17 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 18 | #if CONFIG_IS_ENABLED(DM_REGULATOR) |
| 19 | static const struct pmic_child_info stpmic1_children_info[] = { |
| 20 | { .prefix = "ldo", .driver = "stpmic1_ldo" }, |
| 21 | { .prefix = "buck", .driver = "stpmic1_buck" }, |
| 22 | { .prefix = "vref_ddr", .driver = "stpmic1_vref_ddr" }, |
| 23 | { .prefix = "pwr_sw", .driver = "stpmic1_pwr_sw" }, |
| 24 | { .prefix = "boost", .driver = "stpmic1_boost" }, |
Patrice Chotard | 1f0dfa1 | 2018-04-26 17:13:10 +0200 | [diff] [blame] | 25 | { }, |
| 26 | }; |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 27 | #endif /* DM_REGULATOR */ |
Patrice Chotard | 1f0dfa1 | 2018-04-26 17:13:10 +0200 | [diff] [blame] | 28 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 29 | static int stpmic1_reg_count(struct udevice *dev) |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 30 | { |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 31 | return STPMIC1_NUM_OF_REGS; |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 32 | } |
| 33 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 34 | static int stpmic1_write(struct udevice *dev, uint reg, const uint8_t *buff, |
| 35 | int len) |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 36 | { |
| 37 | int ret; |
| 38 | |
| 39 | ret = dm_i2c_write(dev, reg, buff, len); |
| 40 | if (ret) |
| 41 | dev_err(dev, "%s: failed to write register %#x :%d", |
| 42 | __func__, reg, ret); |
| 43 | |
| 44 | return ret; |
| 45 | } |
| 46 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 47 | static int stpmic1_read(struct udevice *dev, uint reg, uint8_t *buff, int len) |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 48 | { |
| 49 | int ret; |
| 50 | |
| 51 | ret = dm_i2c_read(dev, reg, buff, len); |
| 52 | if (ret) |
| 53 | dev_err(dev, "%s: failed to read register %#x : %d", |
| 54 | __func__, reg, ret); |
| 55 | |
| 56 | return ret; |
| 57 | } |
| 58 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 59 | static int stpmic1_bind(struct udevice *dev) |
Patrice Chotard | 1f0dfa1 | 2018-04-26 17:13:10 +0200 | [diff] [blame] | 60 | { |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 61 | #if CONFIG_IS_ENABLED(DM_REGULATOR) |
Patrice Chotard | 1f0dfa1 | 2018-04-26 17:13:10 +0200 | [diff] [blame] | 62 | ofnode regulators_node; |
| 63 | int children; |
| 64 | |
| 65 | regulators_node = dev_read_subnode(dev, "regulators"); |
| 66 | if (!ofnode_valid(regulators_node)) { |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 67 | dev_dbg(dev, "regulators subnode not found!"); |
Patrice Chotard | 1f0dfa1 | 2018-04-26 17:13:10 +0200 | [diff] [blame] | 68 | return -ENXIO; |
| 69 | } |
| 70 | dev_dbg(dev, "found regulators subnode\n"); |
| 71 | |
| 72 | children = pmic_bind_children(dev, regulators_node, |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 73 | stpmic1_children_info); |
Patrice Chotard | 1f0dfa1 | 2018-04-26 17:13:10 +0200 | [diff] [blame] | 74 | if (!children) |
| 75 | dev_dbg(dev, "no child found\n"); |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 76 | #endif /* DM_REGULATOR */ |
Patrice Chotard | 1f0dfa1 | 2018-04-26 17:13:10 +0200 | [diff] [blame] | 77 | |
Patrick Delaunay | 8811583e | 2019-02-04 11:26:19 +0100 | [diff] [blame^] | 78 | if (CONFIG_IS_ENABLED(SYSRESET)) |
| 79 | return device_bind_driver(dev, "stpmic1-sysreset", |
| 80 | "stpmic1-sysreset", NULL); |
| 81 | |
Patrice Chotard | 1f0dfa1 | 2018-04-26 17:13:10 +0200 | [diff] [blame] | 82 | return 0; |
| 83 | } |
| 84 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 85 | static struct dm_pmic_ops stpmic1_ops = { |
| 86 | .reg_count = stpmic1_reg_count, |
| 87 | .read = stpmic1_read, |
| 88 | .write = stpmic1_write, |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 89 | }; |
| 90 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 91 | static const struct udevice_id stpmic1_ids[] = { |
| 92 | { .compatible = "st,stpmic1" }, |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 93 | { } |
| 94 | }; |
| 95 | |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 96 | U_BOOT_DRIVER(pmic_stpmic1) = { |
| 97 | .name = "stpmic1_pmic", |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 98 | .id = UCLASS_PMIC, |
Patrick Delaunay | 42f01aa | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 99 | .of_match = stpmic1_ids, |
| 100 | .bind = stpmic1_bind, |
| 101 | .ops = &stpmic1_ops, |
Patrick Delaunay | 5d0c74e | 2018-03-12 10:46:12 +0100 | [diff] [blame] | 102 | }; |
Patrick Delaunay | 8811583e | 2019-02-04 11:26:19 +0100 | [diff] [blame^] | 103 | |
| 104 | #ifdef CONFIG_SYSRESET |
| 105 | static int stpmic1_sysreset_request(struct udevice *dev, enum sysreset_t type) |
| 106 | { |
| 107 | struct udevice *pmic_dev; |
| 108 | int ret; |
| 109 | |
| 110 | if (type != SYSRESET_POWER) |
| 111 | return -EPROTONOSUPPORT; |
| 112 | |
| 113 | ret = uclass_get_device_by_driver(UCLASS_PMIC, |
| 114 | DM_GET_DRIVER(pmic_stpmic1), |
| 115 | &pmic_dev); |
| 116 | |
| 117 | if (ret) |
| 118 | return -EOPNOTSUPP; |
| 119 | |
| 120 | ret = pmic_reg_read(pmic_dev, STPMIC1_MAIN_CR); |
| 121 | if (ret < 0) |
| 122 | return ret; |
| 123 | |
| 124 | ret = pmic_reg_write(pmic_dev, STPMIC1_MAIN_CR, |
| 125 | ret | STPMIC1_SWOFF | STPMIC1_RREQ_EN); |
| 126 | if (ret < 0) |
| 127 | return ret; |
| 128 | |
| 129 | return -EINPROGRESS; |
| 130 | } |
| 131 | |
| 132 | static struct sysreset_ops stpmic1_sysreset_ops = { |
| 133 | .request = stpmic1_sysreset_request, |
| 134 | }; |
| 135 | |
| 136 | U_BOOT_DRIVER(stpmic1_sysreset) = { |
| 137 | .name = "stpmic1-sysreset", |
| 138 | .id = UCLASS_SYSRESET, |
| 139 | .ops = &stpmic1_sysreset_ops, |
| 140 | }; |
| 141 | #endif |