blob: 220785ca9eeb94d3919f7d399afd74ce995ad7be [file] [log] [blame]
Stefan Roese8870e452013-04-09 21:06:08 +00001/*
2 * Copyright 2013 Stefan Roese <sr@denx.de>
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <common.h>
19#include <asm/errno.h>
20#include <asm/io.h>
21#include <asm/imx-common/regs-common.h>
22
23/* 1 second delay should be plenty of time for block reset. */
24#define RESET_MAX_TIMEOUT 1000000
25
26#define MXS_BLOCK_SFTRST (1 << 31)
27#define MXS_BLOCK_CLKGATE (1 << 30)
28
29int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned
30 int timeout)
31{
32 while (--timeout) {
33 if ((readl(&reg->reg) & mask) == mask)
34 break;
35 udelay(1);
36 }
37
38 return !timeout;
39}
40
41int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned
42 int timeout)
43{
44 while (--timeout) {
45 if ((readl(&reg->reg) & mask) == 0)
46 break;
47 udelay(1);
48 }
49
50 return !timeout;
51}
52
53int mxs_reset_block(struct mxs_register_32 *reg)
54{
55 /* Clear SFTRST */
56 writel(MXS_BLOCK_SFTRST, &reg->reg_clr);
57
58 if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
59 return 1;
60
61 /* Clear CLKGATE */
62 writel(MXS_BLOCK_CLKGATE, &reg->reg_clr);
63
64 /* Set SFTRST */
65 writel(MXS_BLOCK_SFTRST, &reg->reg_set);
66
67 /* Wait for CLKGATE being set */
68 if (mxs_wait_mask_set(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
69 return 1;
70
71 /* Clear SFTRST */
72 writel(MXS_BLOCK_SFTRST, &reg->reg_clr);
73
74 if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
75 return 1;
76
77 /* Clear CLKGATE */
78 writel(MXS_BLOCK_CLKGATE, &reg->reg_clr);
79
80 if (mxs_wait_mask_clr(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
81 return 1;
82
83 return 0;
84}