blob: 727c6483193a0a740e9dd29ca19aead7710304e3 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Nishanth Menon9a0f4002015-07-22 18:05:41 -05002/*
3 * ti_armv7_omap.h
4 *
5 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
6 *
Nishanth Menon9a0f4002015-07-22 18:05:41 -05007 * The various ARMv7 SoCs from TI all share a number of IP blocks when
8 * implementing a given feature. This is meant to isolate the features
9 * that are based on OMAP architecture.
10 */
11#ifndef __CONFIG_TI_ARMV7_OMAP_H__
12#define __CONFIG_TI_ARMV7_OMAP_H__
13
Nishanth Menon9a0f4002015-07-22 18:05:41 -050014/*
15 * GPMC NAND block. We support 1 device and the physical address to
16 * access CS0 at is 0x8000000.
17 */
Miquel Raynal88718be2019-10-03 19:50:03 +020018#ifdef CONFIG_MTD_RAW_NAND
Nishanth Menon9a0f4002015-07-22 18:05:41 -050019#ifndef CONFIG_SYS_NAND_BASE
20#define CONFIG_SYS_NAND_BASE 0x8000000
21#endif
22#define CONFIG_SYS_MAX_NAND_DEVICE 1
Nishanth Menon9a0f4002015-07-22 18:05:41 -050023#endif
24
25/* Now for the remaining common defines */
26#include <configs/ti_armv7_common.h>
27
28#endif /* __CONFIG_TI_ARMV7_OMAP_H__ */