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Wu, Josh9e336902013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh9e336902013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
13/*
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
16 */
17#include <asm/hardware.h>
18
19#define CONFIG_SYS_TEXT_BASE 0x26f00000
20
Wu, Josh9e336902013-04-16 23:42:44 +000021/* ARM asynchronous clock */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh9e336902013-04-16 23:42:44 +000024
25/* Misc CPU related */
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29#define CONFIG_SKIP_LOWLEVEL_INIT
30#define CONFIG_BOARD_EARLY_INIT_F
31#define CONFIG_DISPLAY_CPUINFO
32
33#define CONFIG_OF_LIBFDT
34
35/* general purpose I/O */
36#define CONFIG_AT91_GPIO
37
38/* serial console */
39#define CONFIG_ATMEL_USART
40#define CONFIG_USART_BASE ATMEL_BASE_DBGU
41#define CONFIG_USART_ID ATMEL_ID_SYS
42#define CONFIG_BAUDRATE 115200
43
44/* LCD */
45#define CONFIG_LCD
46#define LCD_BPP LCD_COLOR16
47#define LCD_OUTPUT_BPP 24
48#define CONFIG_LCD_LOGO
49#define CONFIG_LCD_INFO
50#define CONFIG_LCD_INFO_BELOW_LOGO
51#define CONFIG_SYS_WHITE_ON_BLACK
52#define CONFIG_ATMEL_HLCD
53#define CONFIG_ATMEL_LCD_RGB565
54#define CONFIG_SYS_CONSOLE_IS_IN_ENV
55
56#define CONFIG_BOOTDELAY 3
57
58/*
59 * BOOTP options
60 */
61#define CONFIG_BOOTP_BOOTFILESIZE
62#define CONFIG_BOOTP_BOOTPATH
63#define CONFIG_BOOTP_GATEWAY
64#define CONFIG_BOOTP_HOSTNAME
65
66/* NOR flash - no real flash on this board */
67#define CONFIG_SYS_NO_FLASH
68
69/*
70 * Command line configuration.
71 */
Wu, Josh9e336902013-04-16 23:42:44 +000072#define CONFIG_CMD_BOOTZ
73#define CONFIG_CMD_PING
74#define CONFIG_CMD_DHCP
75#define CONFIG_CMD_NAND
76#define CONFIG_CMD_SF
77#define CONFIG_CMD_MMC
78#define CONFIG_CMD_FAT
Bo Shend9bef0a2013-10-21 16:13:59 +080079#define CONFIG_CMD_USB
Wu, Josh9e336902013-04-16 23:42:44 +000080
81#define CONFIG_NR_DRAM_BANKS 1
82#define CONFIG_SYS_SDRAM_BASE 0x20000000
83#define CONFIG_SYS_SDRAM_SIZE 0x08000000
84
85/*
86 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
87 * leaving the correct space for initial global data structure above
88 * that address while providing maximum stack area below.
89 */
90# define CONFIG_SYS_INIT_SP_ADDR \
91 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
92
93/* DataFlash */
94#ifdef CONFIG_CMD_SF
95#define CONFIG_ATMEL_SPI
Wu, Josh9e336902013-04-16 23:42:44 +000096#define CONFIG_SF_DEFAULT_SPEED 30000000
97#define CONFIG_ENV_SPI_MODE SPI_MODE_3
98#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
99#endif
100
101/* NAND flash */
102#ifdef CONFIG_CMD_NAND
103#define CONFIG_NAND_ATMEL
104#define CONFIG_SYS_MAX_NAND_DEVICE 1
105#define CONFIG_SYS_NAND_BASE 0x40000000
106#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
107#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmannac45bb12013-11-29 12:13:45 +0100108#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
109#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Wu, Josh9e336902013-04-16 23:42:44 +0000110
111/* PMECC & PMERRLOC */
112#define CONFIG_ATMEL_NAND_HWECC
113#define CONFIG_ATMEL_NAND_HW_PMECC
114#define CONFIG_PMECC_CAP 2
115#define CONFIG_PMECC_SECTOR_SIZE 512
116#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
Bo Shence76f0a2013-06-26 10:48:53 +0800117
118#define CONFIG_CMD_NAND_TRIMFFS
119
Wu, Josh9e336902013-04-16 23:42:44 +0000120#endif
121
122#define CONFIG_MTD_PARTITIONS
123#define CONFIG_MTD_DEVICE
124#define CONFIG_CMD_MTDPARTS
125#define MTDIDS_DEFAULT "nand0=atmel_nand"
126#define MTDPARTS_DEFAULT \
127 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
128 "256k(env),256k(env_redundant),256k(spare)," \
129 "512k(dtb),6M(kernel)ro,-(rootfs)"
130
131#define CONFIG_EXTRA_ENV_SETTINGS \
132 "console=console=ttyS0,115200\0" \
133 "mtdparts="MTDPARTS_DEFAULT"\0" \
134 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
135 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
136
137/* MMC */
138#ifdef CONFIG_CMD_MMC
139#define CONFIG_MMC
140#define CONFIG_GENERIC_MMC
141#define CONFIG_GENERIC_ATMEL_MCI
142#endif
143
144/* FAT */
145#ifdef CONFIG_CMD_FAT
146#define CONFIG_DOS_PARTITION
147#endif
148
Bo Shen16276222013-04-24 10:46:18 +0800149/* Ethernet */
150#define CONFIG_KS8851_MLL
151#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
152
Wu, Josh9e336902013-04-16 23:42:44 +0000153#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
154
155#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
156#define CONFIG_SYS_MEMTEST_END 0x26e00000
157
Bo Shend9bef0a2013-10-21 16:13:59 +0800158/* USB host */
159#ifdef CONFIG_CMD_USB
160#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +0800161#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shend9bef0a2013-10-21 16:13:59 +0800162#define CONFIG_USB_OHCI_NEW
163#define CONFIG_SYS_USB_OHCI_CPU_INIT
164#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
165#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
166#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
167#define CONFIG_USB_STORAGE
168#endif
169
Wu, Josh9e336902013-04-16 23:42:44 +0000170#ifdef CONFIG_SYS_USE_SPIFLASH
171
172/* bootstrap + u-boot + env + linux in dataflash on CS0 */
173#define CONFIG_ENV_IS_IN_SPI_FLASH
174#define CONFIG_ENV_OFFSET 0x5000
175#define CONFIG_ENV_SIZE 0x3000
176#define CONFIG_ENV_SECT_SIZE 0x1000
177#define CONFIG_BOOTCOMMAND \
178 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
179 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
180 "bootm 0x22000000"
181
182#elif defined(CONFIG_SYS_USE_NANDFLASH)
183
184/* bootstrap + u-boot + env + linux in nandflash */
185#define CONFIG_ENV_IS_IN_NAND
186#define CONFIG_ENV_OFFSET 0xc0000
187#define CONFIG_ENV_OFFSET_REDUND 0x100000
188#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
189#define CONFIG_BOOTCOMMAND \
190 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
191 "nand read 0x21000000 0x180000 0x080000;" \
192 "nand read 0x22000000 0x200000 0x400000;" \
193 "bootm 0x22000000 - 0x21000000"
194
195#else /* CONFIG_SYS_USE_MMC */
196
197/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh23ac62d2015-03-24 17:07:22 +0800198
199#ifdef CONFIG_ENV_IS_IN_MMC
200/* Use raw reserved sectors to save environment */
Wu, Josh9e336902013-04-16 23:42:44 +0000201#define CONFIG_ENV_OFFSET 0x2000
202#define CONFIG_ENV_SIZE 0x1000
203#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh23ac62d2015-03-24 17:07:22 +0800204#else
205/* Use file in FAT file to save environment */
206#define CONFIG_ENV_IS_IN_FAT
207#define CONFIG_FAT_WRITE
208#define FAT_ENV_INTERFACE "mmc"
209#define FAT_ENV_FILE "uboot.env"
210#define FAT_ENV_DEVICE_AND_PART "0"
211#define CONFIG_ENV_SIZE 0x4000
212#endif
213
Wu, Josh9e336902013-04-16 23:42:44 +0000214#define CONFIG_BOOTCOMMAND \
215 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
216 "fatload mmc 0:1 0x21000000 dtb;" \
217 "fatload mmc 0:1 0x22000000 uImage;" \
218 "bootm 0x22000000 - 0x21000000"
219
220#endif
221
Wu, Josh9e336902013-04-16 23:42:44 +0000222#define CONFIG_SYS_CBSIZE 256
223#define CONFIG_SYS_MAXARGS 16
Wu, Josh9e336902013-04-16 23:42:44 +0000224#define CONFIG_SYS_LONGHELP
225#define CONFIG_CMDLINE_EDITING
226#define CONFIG_AUTO_COMPLETE
227#define CONFIG_SYS_HUSH_PARSER
228
229/*
230 * Size of malloc() pool
231 */
232#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shenff255e82015-03-27 14:23:36 +0800233
234/* SPL */
235#define CONFIG_SPL_FRAMEWORK
236#define CONFIG_SPL_TEXT_BASE 0x300000
237#define CONFIG_SPL_MAX_SIZE 0x6000
238#define CONFIG_SPL_STACK 0x308000
239
240#define CONFIG_SPL_BSS_START_ADDR 0x20000000
241#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
242#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
243#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
244
245#define CONFIG_SPL_LIBCOMMON_SUPPORT
246#define CONFIG_SPL_LIBGENERIC_SUPPORT
247#define CONFIG_SPL_GPIO_SUPPORT
248#define CONFIG_SPL_SERIAL_SUPPORT
249
250#define CONFIG_SPL_BOARD_INIT
251#define CONFIG_SYS_MONITOR_LEN (512 << 10)
252
253#define CONFIG_SYS_MASTER_CLOCK 132096000
254#define CONFIG_SYS_AT91_PLLA 0x20953f03
255#define CONFIG_SYS_MCKR 0x1301
256#define CONFIG_SYS_MCKR_CSS 0x1302
257
Bo Shenff255e82015-03-27 14:23:36 +0800258#ifdef CONFIG_SYS_USE_MMC
259#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
260#define CONFIG_SPL_MMC_SUPPORT
261#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
262#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
263#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
264#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
265#define CONFIG_SPL_FAT_SUPPORT
266#define CONFIG_SPL_LIBDISK_SUPPORT
267
268#elif CONFIG_SYS_USE_NANDFLASH
269#define CONFIG_SPL_NAND_SUPPORT
270#define CONFIG_SPL_NAND_DRIVERS
271#define CONFIG_SPL_NAND_BASE
272#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
273#define CONFIG_SYS_NAND_5_ADDR_CYCLE
274#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
275#define CONFIG_SYS_NAND_PAGE_COUNT 64
276#define CONFIG_SYS_NAND_OOBSIZE 64
277#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
278#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
279#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
280
281#elif CONFIG_SYS_USE_SPIFLASH
282#define CONFIG_SPL_SPI_SUPPORT
283#define CONFIG_SPL_SPI_FLASH_SUPPORT
284#define CONFIG_SPL_SPI_LOAD
285#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
286
287#endif
Wu, Josh9e336902013-04-16 23:42:44 +0000288
289#endif