blob: 303e35313abbf55f1cba8e64d294865abf1f9ac8 [file] [log] [blame]
Haavard Skinnemoendf548d32006-11-19 18:06:53 +01001/*
Haavard Skinnemoenab0df362008-08-29 21:09:49 +02002 * Copyright (C) 2006, 2008 Atmel Corporation
Haavard Skinnemoendf548d32006-11-19 18:06:53 +01003 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22#ifndef __ASM_AVR32_ARCH_GPIO_H__
23#define __ASM_AVR32_ARCH_GPIO_H__
24
Haavard Skinnemoen5fee84a2007-10-29 13:23:33 +010025#include <asm/arch/chip-features.h>
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010026#include <asm/arch/memory-map.h>
27
28#define NR_GPIO_CONTROLLERS 5
29
30/*
31 * Pin numbers identifying specific GPIO pins on the chip.
32 */
33#define GPIO_PIOA_BASE (0)
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010034#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010035#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010036#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010037#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020038#define GPIO_PIN_PA(x) (GPIO_PIOA_BASE + (x))
39#define GPIO_PIN_PB(x) (GPIO_PIOB_BASE + (x))
40#define GPIO_PIN_PC(x) (GPIO_PIOC_BASE + (x))
41#define GPIO_PIN_PD(x) (GPIO_PIOD_BASE + (x))
42#define GPIO_PIN_PE(x) (GPIO_PIOE_BASE + (x))
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010043
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020044static inline void *pio_pin_to_port(unsigned int pin)
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010045{
46 switch (pin >> 5) {
47 case 0:
48 return (void *)PIOA_BASE;
49 case 1:
50 return (void *)PIOB_BASE;
51 case 2:
52 return (void *)PIOC_BASE;
53 case 3:
54 return (void *)PIOD_BASE;
55 case 4:
56 return (void *)PIOE_BASE;
57 default:
58 return NULL;
59 }
60}
61
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020062#include <asm/arch-common/portmux-pio.h>
Haavard Skinnemoendf548d32006-11-19 18:06:53 +010063
64#endif /* __ASM_AVR32_ARCH_GPIO_H__ */