blob: 67a16039d146bb6a9e531ebd4c816ff3c373de24 [file] [log] [blame]
Stephen Warren10a03382016-05-12 13:32:56 -06001/*
2 * Copyright (c) 2013-2016, NVIDIA CORPORATION.
3 *
4 * SPDX-License-Identifier: GPL-2.0
5 */
6
7#ifndef _P2771_0000_H
8#define _P2771_0000_H
9
10#include <linux/sizes.h>
11
12#include "tegra186-common.h"
13
14/* High-level configuration options */
15#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000"
16
Bryan Wuad3c1442016-07-27 15:48:22 -060017/* I2C */
18#define CONFIG_SYS_I2C_TEGRA
19
Stephen Warren10a03382016-05-12 13:32:56 -060020/* SD/MMC */
21#define CONFIG_MMC
22#define CONFIG_GENERIC_MMC
23#define CONFIG_TEGRA_MMC
24
25/* Environment in eMMC, at the end of 2nd "boot sector" */
26#define CONFIG_ENV_IS_IN_MMC
27#define CONFIG_SYS_MMC_ENV_DEV 0
28#define CONFIG_SYS_MMC_ENV_PART 2
29#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
30
Stephen Warrena6bb0082016-07-29 13:15:06 -060031/* PCI host support */
Stephen Warrena6bb0082016-07-29 13:15:06 -060032#define CONFIG_CMD_PCI
33
Stephen Warren10a03382016-05-12 13:32:56 -060034#include "tegra-common-post.h"
35
36/* Crystal is 38.4MHz. clk_m runs at half that rate */
37#define COUNTER_FREQUENCY 19200000
38
39#endif