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Marek Vasutaaa2a2f2010-07-18 05:23:19 +02001/*
2 * Palm Tungsten|C configuration file
3 *
4 * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#ifndef __CONFIG_H
23#define __CONFIG_H
24
25#include <asm/arch/pxa-regs.h>
26
27/*
28 * High Level Board Configuration Options
29 */
Marek Vasutabc20ab2011-11-26 07:20:07 +010030#define CONFIG_CPU_PXA25X 1 /* Intel PXA255 CPU */
Marek Vasutaaa2a2f2010-07-18 05:23:19 +020031#define CONFIG_PALMTC 1 /* Palm Tungsten|C board */
32
Simon Glass89959082012-10-30 13:38:53 +000033/* we will never enable dcache, because we have to setup MMU first */
34#define CONFIG_SYS_DCACHE_OFF
35
Marek Vasutaaa2a2f2010-07-18 05:23:19 +020036/*
37 * Environment settings
38 */
39#define CONFIG_ENV_OVERWRITE
40#define CONFIG_SYS_MALLOC_LEN (128*1024)
Marek Vasut0f7c54f2010-10-20 21:06:23 +020041#define CONFIG_SYS_TEXT_BASE 0x0
Marek Vasutaaa2a2f2010-07-18 05:23:19 +020042
43#define CONFIG_BOOTCOMMAND \
44 "if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \
45 "source 0xa0000000; " \
46 "else " \
47 "bootm 0x80000; " \
48 "fi; "
49#define CONFIG_BOOTARGS \
50 "console=tty0 console=ttyS0,115200"
51#define CONFIG_TIMESTAMP
52#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
53#define CONFIG_CMDLINE_TAG
54#define CONFIG_SETUP_MEMORY_TAGS
55
56#define CONFIG_LZMA /* LZMA compression support */
57
58/*
59 * Serial Console Configuration
60 * STUART - the lower serial port on Colibri board
61 */
62#define CONFIG_PXA_SERIAL
63#define CONFIG_FFUART 1
Marek Vasutce6971c2012-09-12 12:36:25 +020064#define CONFIG_CONS_INDEX 3
Marek Vasutaaa2a2f2010-07-18 05:23:19 +020065#define CONFIG_BAUDRATE 115200
Marek Vasutaaa2a2f2010-07-18 05:23:19 +020066
67/*
68 * Bootloader Components Configuration
69 */
70#include <config_cmd_default.h>
71
72#undef CONFIG_CMD_NET
Sebastien Carlier6d8962e2010-11-05 15:48:07 +010073#undef CONFIG_CMD_NFS
Marek Vasutaaa2a2f2010-07-18 05:23:19 +020074#define CONFIG_CMD_ENV
75#define CONFIG_CMD_MMC
76#define CONFIG_LCD
77
78/*
79 * MMC Card Configuration
80 */
81#ifdef CONFIG_CMD_MMC
82#define CONFIG_MMC
Marek Vasut831f8492012-09-30 10:09:49 +000083#define CONFIG_GENERIC_MMC
84#define CONFIG_PXA_MMC_GENERIC
Marek Vasutaaa2a2f2010-07-18 05:23:19 +020085#define CONFIG_SYS_MMC_BASE 0xF0000000
86#define CONFIG_CMD_FAT
87#define CONFIG_CMD_EXT2
88#define CONFIG_DOS_PARTITION
89#endif
90
91/*
92 * LCD
93 */
94#ifdef CONFIG_LCD
95#define CONFIG_ACX517AKN
96#define CONFIG_VIDEO_LOGO
97#define CONFIG_CMD_BMP
98#define CONFIG_SPLASH_SCREEN
99#define CONFIG_SPLASH_SCREEN_ALIGN
100#define CONFIG_VIDEO_BMP_GZIP
101#define CONFIG_VIDEO_BMP_RLE8
102#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
103#endif
104
105/*
106 * KGDB
107 */
108#ifdef CONFIG_CMD_KGDB
109#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
110#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
111#endif
112
113/*
114 * HUSH Shell Configuration
115 */
116#define CONFIG_SYS_HUSH_PARSER 1
Marek Vasutaaa2a2f2010-07-18 05:23:19 +0200117
118#define CONFIG_SYS_LONGHELP
119#ifdef CONFIG_SYS_HUSH_PARSER
120#define CONFIG_SYS_PROMPT "$ "
121#else
122#define CONFIG_SYS_PROMPT "=> "
123#endif
124#define CONFIG_SYS_CBSIZE 256
125#define CONFIG_SYS_PBSIZE \
126 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
127#define CONFIG_SYS_MAXARGS 16
128#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
129#define CONFIG_SYS_DEVICE_NULLDEV 1
130
131/*
132 * Clock Configuration
133 */
134#undef CONFIG_SYS_CLKS_IN_HZ
135#define CONFIG_SYS_HZ 3686400 /* Timer @ 3686400 Hz */
136#define CONFIG_SYS_CPUSPEED 0x161 /* 400MHz;L=1 M=3 T=1 */
137
138/*
Marek Vasutaaa2a2f2010-07-18 05:23:19 +0200139 * DRAM Map
140 */
141#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
142#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
143#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
144
145#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
146#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */
147
148#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
149#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
150
151#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
152
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200153#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Marek Vasut00d5ec92011-11-26 12:04:11 +0100154#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200155
Marek Vasutaaa2a2f2010-07-18 05:23:19 +0200156/*
157 * NOR FLASH
158 */
159#ifdef CONFIG_CMD_FLASH
160#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
161#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
162#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
163
164#define CONFIG_SYS_FLASH_CFI
165#define CONFIG_FLASH_CFI_DRIVER 1
166#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
167
168#define CONFIG_SYS_MAX_FLASH_BANKS 1
169#define CONFIG_SYS_MAX_FLASH_SECT 64
170
171#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
172
173#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ)
174#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ)
175#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ)
176#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ)
177#define CONFIG_SYS_FLASH_PROTECTION
178
179#define CONFIG_ENV_IS_IN_FLASH 1
180#define CONFIG_ENV_SECT_SIZE 0x40000
181#else
182#define CONFIG_SYS_NO_FLASH
183#define CONFIG_ENV_IS_NOWHERE
184#endif
185
186#define CONFIG_SYS_MONITOR_BASE 0x0
187#define CONFIG_SYS_MONITOR_LEN 0x40000
188
189#define CONFIG_ENV_SIZE 0x4000
190#define CONFIG_ENV_ADDR 0x40000
191
192/*
193 * GPIO settings
194 */
195#define CONFIG_SYS_GAFR0_L_VAL 0x00011004
196#define CONFIG_SYS_GAFR0_U_VAL 0xa5000008
197#define CONFIG_SYS_GAFR1_L_VAL 0x60888050
198#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50aaa
199#define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa
200#define CONFIG_SYS_GAFR2_U_VAL 0x00000000
201#define CONFIG_SYS_GPCR0_VAL 0x0
202#define CONFIG_SYS_GPCR1_VAL 0x0
203#define CONFIG_SYS_GPCR2_VAL 0x0
204#define CONFIG_SYS_GPDR0_VAL 0xcfff8140
205#define CONFIG_SYS_GPDR1_VAL 0xfcbfbef3
206#define CONFIG_SYS_GPDR2_VAL 0x0001ffff
207#define CONFIG_SYS_GPSR0_VAL 0x00010f8f
208#define CONFIG_SYS_GPSR1_VAL 0x00bf5de5
209#define CONFIG_SYS_GPSR2_VAL 0x03fe0800
210
211#define CONFIG_SYS_PSSR_VAL PSSR_RDH
212
213/* Clock setup:
214 * CKEN[1] - PWM1 ; CKEN[6] - FFUART
215 * CKEN[12] - MMC ; CKEN[16] - LCD
216 */
217#define CONFIG_SYS_CKEN 0x00011042
218#define CONFIG_SYS_CCCR 0x00000161
219
220/*
221 * Memory settings
222 */
223#define CONFIG_SYS_MSC0_VAL 0x800092c2
224#define CONFIG_SYS_MSC1_VAL 0x80008000
225#define CONFIG_SYS_MSC2_VAL 0x80008000
226#define CONFIG_SYS_MDCNFG_VAL 0x00001ac9
227#define CONFIG_SYS_MDREFR_VAL 0x00118018
228#define CONFIG_SYS_MDMRS_VAL 0x00220032
229#define CONFIG_SYS_FLYCNFG_VAL 0x01fe01fe
230#define CONFIG_SYS_SXCNFG_VAL 0x00000000
231
232/*
233 * PCMCIA and CF Interfaces
234 */
235#define CONFIG_SYS_MECR_VAL 0x00000000
236#define CONFIG_SYS_MCMEM0_VAL 0x00010504
237#define CONFIG_SYS_MCMEM1_VAL 0x00010504
238#define CONFIG_SYS_MCATT0_VAL 0x00010504
239#define CONFIG_SYS_MCATT1_VAL 0x00010504
240#define CONFIG_SYS_MCIO0_VAL 0x00010e04
241#define CONFIG_SYS_MCIO1_VAL 0x00010e04
242
243#endif /* __CONFIG_H */