blob: caeaec9287fe621cefeafa9dc2f1eba92a2df12b [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Bin Mengb5b6b012015-04-24 18:10:05 +08002/*
3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 *
5 * Part of this file is ported from coreboot src/arch/x86/boot/pirq_routing.c
Bin Mengb5b6b012015-04-24 18:10:05 +08006 */
7
8#include <common.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -06009#include <log.h>
Bin Mengb5b6b012015-04-24 18:10:05 +080010#include <pci.h>
Simon Glass401d1c42020-10-30 21:38:53 -060011#include <asm/global_data.h>
Bin Mengb5b6b012015-04-24 18:10:05 +080012#include <asm/pci.h>
13#include <asm/pirq_routing.h>
Bin Mengb5b6b012015-04-24 18:10:05 +080014
Simon Glass59243412019-12-06 21:42:15 -070015DECLARE_GLOBAL_DATA_PTR;
16
Simon Glass33770582017-01-16 07:04:18 -070017static u8 pirq_get_next_free_irq(struct udevice *dev, u8 *pirq, u16 bitmap,
18 bool irq_already_routed[])
Bin Mengb5b6b012015-04-24 18:10:05 +080019{
20 int i, link;
21 u8 irq = 0;
22
23 /* IRQ sharing starts from IRQ#3 */
24 for (i = 3; i < 16; i++) {
25 /* Can we assign this IRQ? */
26 if (!((bitmap >> i) & 1))
27 continue;
28
29 /* We can, now let's assume we can use this IRQ */
30 irq = i;
31
32 /* Have we already routed it? */
33 if (irq_already_routed[irq])
34 continue;
35
36 for (link = 0; link < CONFIG_MAX_PIRQ_LINKS; link++) {
Bin Mengb46c2082016-02-01 01:40:51 -080037 if (pirq_check_irq_routed(dev, link, irq)) {
Bin Mengb5b6b012015-04-24 18:10:05 +080038 irq_already_routed[irq] = true;
39 break;
40 }
41 }
42
43 /* If it's not yet routed, use it */
44 if (!irq_already_routed[irq]) {
45 irq_already_routed[irq] = true;
46 break;
47 }
48
49 /* But if it was already routed, try the next one */
50 }
51
52 /* Now we get our IRQ */
53 return irq;
54}
55
Bin Mengb46c2082016-02-01 01:40:51 -080056void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num)
Bin Mengb5b6b012015-04-24 18:10:05 +080057{
58 unsigned char irq_slot[MAX_INTX_ENTRIES];
59 unsigned char pirq[CONFIG_MAX_PIRQ_LINKS];
Simon Glass33770582017-01-16 07:04:18 -070060 bool irq_already_routed[16];
Bin Mengb5b6b012015-04-24 18:10:05 +080061 int i, intx;
62
63 memset(pirq, 0, CONFIG_MAX_PIRQ_LINKS);
Simon Glass33770582017-01-16 07:04:18 -070064 memset(irq_already_routed, '\0', sizeof(irq_already_routed));
Bin Mengb5b6b012015-04-24 18:10:05 +080065
66 /* Set PCI IRQs */
67 for (i = 0; i < num; i++) {
68 debug("PIRQ Entry %d Dev: %d.%x.%d\n", i,
69 irq->bus, irq->devfn >> 3, irq->devfn & 7);
70
71 for (intx = 0; intx < MAX_INTX_ENTRIES; intx++) {
72 int link = irq->irq[intx].link;
73 int bitmap = irq->irq[intx].bitmap;
74 int irq = 0;
75
76 debug("INT%c link: %x bitmap: %x ",
77 'A' + intx, link, bitmap);
78
79 if (!bitmap || !link) {
80 debug("not routed\n");
81 irq_slot[intx] = irq;
82 continue;
83 }
84
85 /* translate link value to link number */
Bin Mengb46c2082016-02-01 01:40:51 -080086 link = pirq_translate_link(dev, link);
Bin Mengb5b6b012015-04-24 18:10:05 +080087
88 /* yet not routed */
89 if (!pirq[link]) {
Simon Glass33770582017-01-16 07:04:18 -070090 irq = pirq_get_next_free_irq(dev, pirq, bitmap,
91 irq_already_routed);
Bin Mengb5b6b012015-04-24 18:10:05 +080092 pirq[link] = irq;
93 } else {
94 irq = pirq[link];
95 }
96
97 debug("IRQ: %d\n", irq);
98 irq_slot[intx] = irq;
99
100 /* Assign IRQ in the interrupt router */
Bin Mengb46c2082016-02-01 01:40:51 -0800101 pirq_assign_irq(dev, link, irq);
Bin Mengb5b6b012015-04-24 18:10:05 +0800102 }
103
104 /* Bus, device, slots IRQs for {A,B,C,D} */
Bin Meng31a2dc62015-07-15 16:23:40 +0800105 pci_assign_irqs(irq->bus, irq->devfn >> 3, irq_slot);
Bin Mengb5b6b012015-04-24 18:10:05 +0800106
107 irq++;
108 }
109
110 for (i = 0; i < CONFIG_MAX_PIRQ_LINKS; i++)
111 debug("PIRQ%c: %d\n", 'A' + i, pirq[i]);
112}
113
114u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt)
115{
Bin Meng283a08e2015-04-27 14:16:01 +0800116 struct irq_routing_table *rom_rt;
Bin Mengb5b6b012015-04-24 18:10:05 +0800117
Bin Mengb5b6b012015-04-24 18:10:05 +0800118 /* Align the table to be 16 byte aligned */
119 addr = ALIGN(addr, 16);
120
121 debug("Copying Interrupt Routing Table to 0x%x\n", addr);
Simon Glass113e7552017-01-16 07:03:42 -0700122 memcpy((void *)(uintptr_t)addr, rt, rt->size);
Bin Mengb5b6b012015-04-24 18:10:05 +0800123
Bin Meng283a08e2015-04-27 14:16:01 +0800124 /*
125 * We do the sanity check here against the copied table after memcpy,
126 * as something might go wrong after the memcpy, which is normally
127 * due to the F segment decode is not turned on to systeam RAM.
128 */
Simon Glass113e7552017-01-16 07:03:42 -0700129 rom_rt = (struct irq_routing_table *)(uintptr_t)addr;
Bin Meng283a08e2015-04-27 14:16:01 +0800130 if (rom_rt->signature != PIRQ_SIGNATURE ||
131 rom_rt->version != PIRQ_VERSION || rom_rt->size % 16) {
132 printf("Interrupt Routing Table not valid\n");
133 return addr;
134 }
135
Bin Mengb5b6b012015-04-24 18:10:05 +0800136 return addr + rt->size;
137}
Simon Glass59243412019-12-06 21:42:15 -0700138
139ulong write_pirq_routing_table(ulong addr)
140{
141 if (!gd->arch.pirq_routing_table)
142 return addr;
143
144 return copy_pirq_routing_table(addr, gd->arch.pirq_routing_table);
145}