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Bartlomiej Sieka53d4a492007-02-09 10:45:42 +01001/*
2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * modified for Promess PRO - by Andy Joseph, andy@promessdev.com
6 * modified for Promess PRO-Motion - by Robert McCullough, rob@promessdev.com
7 * modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3
8 * Also changed the refresh for 100Mhz operation
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
30#include <mpc5xxx.h>
Bartlomiej Siekac00125e2007-05-27 16:58:45 +020031#include <miiphy.h>
Bartlomiej Sieka1f1369c2007-05-08 09:21:57 +020032#if defined(CONFIG_OF_FLAT_TREE)
33#include <ft_build.h>
34#endif
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +010035
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +020036#if defined(CONFIG_STATUS_LED)
37#include <status_led.h>
38#endif /* CONFIG_STATUS_LED */
39
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +010040/* Kollmorgen DPR initialization data */
41struct init_elem {
42 unsigned long addr;
43 unsigned len;
44 char *data;
45 } init_seq[] = {
46 {0x500003F2, 2, "\x86\x00"}, /* HW parameter */
47 {0x500003F0, 2, "\x00\x00"},
48 {0x500003EC, 4, "\x00\x80\xc1\x52"}, /* Magic word */
49 };
50
51/*
52 * Initialize Kollmorgen DPR
53 */
54static void kollmorgen_init(void)
55{
56 unsigned i, j;
57 vu_char *p;
58
59 for (i = 0; i < sizeof(init_seq) / sizeof(struct init_elem); ++i) {
60 p = (vu_char *)init_seq[i].addr;
61 for (j = 0; j < init_seq[i].len; ++j)
62 *(p + j) = *(init_seq[i].data + j);
63 }
64
65 printf("DPR: Kollmorgen DPR initialized\n");
66}
67
68
69/*
70 * Early board initalization.
71 */
72int board_early_init_r(void)
73{
74 /* Now, when we are in RAM, disable Boot Chipselect and enable CS0 */
75 *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25);
76 *(vu_long *)MPC5XXX_ADDECR |= (1 << 16);
77
78 /* Initialize Kollmorgen DPR */
79 kollmorgen_init();
80
81 return 0;
82}
83
84
Bartlomiej Siekac00125e2007-05-27 16:58:45 +020085/*
86 * Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(),
87 * PHY goes into FX mode. To take it out of the FX mode and switch into
88 * desired TX operation, one needs to clear the FX_SEL bit of Mode Control
89 * Register.
90 */
91void reset_phy(void)
92{
93 unsigned short mode_control;
94
95 miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control);
96 miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15,
97 mode_control & 0xfffe);
98 return;
99}
100
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100101#ifndef CFG_RAMBOOT
102/*
103 * Helper function to initialize SDRAM controller.
104 */
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200105static void sdram_start(int hi_addr)
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100106{
107 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
108
109 /* unlock mode register */
110 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
111 hi_addr_bit;
112
113 /* precharge all banks */
114 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
115 hi_addr_bit;
116
117 /* auto refresh */
118 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
119 hi_addr_bit;
120
121 /* auto refresh, second time */
122 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
123 hi_addr_bit;
124
125 /* set mode register */
126 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
127
128 /* normal operation */
129 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
130}
131#endif /* !CFG_RAMBOOT */
132
133
134/*
135 * Initalize SDRAM - configure SDRAM controller, detect memory size.
136 */
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200137long int initdram(int board_type)
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100138{
139 ulong dramsize = 0;
140#ifndef CFG_RAMBOOT
141 ulong test1, test2;
142
143 /* configure SDRAM start/end for detection */
144 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
145 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
146
147 /* setup config registers */
148 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
149 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
150
151 sdram_start(0);
152 test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
153 sdram_start(1);
154 test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
155 if (test1 > test2) {
156 sdram_start(0);
157 dramsize = test1;
158 } else {
159 dramsize = test2;
160 }
161
162 /* memory smaller than 1MB is impossible */
163 if (dramsize < (1 << 20))
164 dramsize = 0;
165
166 /* set SDRAM CS0 size according to the amount of RAM found */
Wolfgang Denk74357112007-02-27 14:26:04 +0100167 if (dramsize > 0) {
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100168 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
169 __builtin_ffs(dramsize >> 20) - 1;
Wolfgang Denk74357112007-02-27 14:26:04 +0100170 } else {
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100171 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
Wolfgang Denk74357112007-02-27 14:26:04 +0100172 }
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100173
174 /* let SDRAM CS1 start right after CS0 and disable it */
175 *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize;
176
177#else /* !CFG_RAMBOOT */
178 /* retrieve size of memory connected to SDRAM CS0 */
179 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
180 if (dramsize >= 0x13)
181 dramsize = (1 << (dramsize - 0x13)) << 20;
182 else
183 dramsize = 0;
184#endif /* CFG_RAMBOOT */
185
186 /* return total ram size */
187 return dramsize;
188}
189
190
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200191int checkboard(void)
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100192{
Bartlomiej Siekac75e6392007-05-27 16:55:23 +0200193 uchar rev = *(vu_char *)CPLD_REV_REGISTER;
194 printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev);
Bartlomiej Sieka53d4a492007-02-09 10:45:42 +0100195 return 0;
196}
Bartlomiej Sieka1f1369c2007-05-08 09:21:57 +0200197
198
199#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
200void ft_board_setup(void *blob, bd_t *bd)
201{
202 ft_cpu_setup(blob, bd);
203}
204#endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +0200205
206
207#if defined(CONFIG_STATUS_LED)
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200208void __led_init(led_id_t regaddr, int state)
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +0200209{
210 *((vu_long *) regaddr) |= ENABLE_GPIO_OUT;
211
212 if (state == STATUS_LED_ON)
213 *((vu_long *) regaddr) |= LED_ON;
214 else
215 *((vu_long *) regaddr) &= ~LED_ON;
216}
217
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200218void __led_set(led_id_t regaddr, int state)
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +0200219{
220 if (state == STATUS_LED_ON)
221 *((vu_long *) regaddr) |= LED_ON;
222 else
223 *((vu_long *) regaddr) &= ~LED_ON;
224}
225
Bartlomiej Sieka70492882007-05-27 17:26:46 +0200226void __led_toggle(led_id_t regaddr)
Bartlomiej Siekaa11c0b82007-05-27 16:51:48 +0200227{
228 *((vu_long *) regaddr) ^= LED_ON;
229}
230#endif /* CONFIG_STATUS_LED */