blob: 696423eacbc53de29ed1c2b945305488e1e9635d [file] [log] [blame]
Stefan Roesea4c8d132006-06-02 16:18:04 +02001/*
2 * (C) Copyright 2006
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <ppc4xx.h>
Heiko Schocher566a4942007-06-22 19:11:54 +020026#include <malloc.h>
27#include <command.h>
28#include <crc.h>
Stefan Roesea4c8d132006-06-02 16:18:04 +020029#include <asm/processor.h>
30#include <spd_sdram.h>
Heiko Schocher566a4942007-06-22 19:11:54 +020031#include <status_led.h>
32#include <sha1.h>
Stefan Roesea4c8d132006-06-02 16:18:04 +020033
34DECLARE_GLOBAL_DATA_PTR;
35
36extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
37
Heiko Schocher566a4942007-06-22 19:11:54 +020038unsigned char sha1_checksum[SHA1_SUM_LEN];
39
40/* swap 4 Bits (Bit0 = Bit3, Bit1 = Bit2, Bit2 = Bit1 and Bit3 = Bit0) */
41unsigned char swapbits[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
42 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
43
44static void set_leds (int val)
Stefan Roesea4c8d132006-06-02 16:18:04 +020045{
Heiko Schocher566a4942007-06-22 19:11:54 +020046 out32(GPIO0_OR, (in32 (GPIO0_OR) & ~0x78000000) | (val << 27));
Stefan Roesea4c8d132006-06-02 16:18:04 +020047}
48
Heiko Schocher566a4942007-06-22 19:11:54 +020049#define GET_LEDS ((in32 (GPIO0_OR) & 0x78000000) >> 27)
50
51void __led_init (led_id_t mask, int state)
52{
53 int val = GET_LEDS;
54
55 if (state == STATUS_LED_ON)
56 val |= mask;
57 else
58 val &= ~mask;
59 set_leds (val);
60}
61
62void __led_set (led_id_t mask, int state)
63{
64 int val = GET_LEDS;
65
66 if (state == STATUS_LED_ON)
67 val |= mask;
68 else if (state == STATUS_LED_OFF)
69 val &= ~mask;
70 set_leds (val);
71}
72
73void __led_toggle (led_id_t mask)
74{
75 int val = GET_LEDS;
76
77 val ^= mask;
78 set_leds (val);
79}
80
81static void status_led_blink (void)
82{
83 int i;
84 int val = GET_LEDS;
85
86 /* set all LED which are on, to state BLINKING */
87 for (i = 0; i < 4; i++) {
Heiko Schocher96e1d752007-07-11 18:39:11 +020088 if (val & 0x01) status_led_set (3 - i, STATUS_LED_BLINKING);
89 else status_led_set (3 - i, STATUS_LED_OFF);
90 val = val >> 1;
Heiko Schocher566a4942007-06-22 19:11:54 +020091 }
92}
93
94#if defined(CONFIG_SHOW_BOOT_PROGRESS)
95void show_boot_progress (int val)
96{
97 /* find all valid Codes for val in README */
98 if (val == -30) return;
99 if (val < 0) {
100 /* smthing goes wrong */
101 status_led_blink ();
102 return;
103 }
104 switch (val) {
105 case 1:
106 /* validating Image */
107 status_led_set (0, STATUS_LED_OFF);
108 status_led_set (1, STATUS_LED_ON);
109 status_led_set (2, STATUS_LED_ON);
110 break;
111 case 15:
112 /* booting */
113 status_led_set (0, STATUS_LED_ON);
114 status_led_set (1, STATUS_LED_ON);
115 status_led_set (2, STATUS_LED_ON);
116 break;
Heiko Schocher96e1d752007-07-11 18:39:11 +0200117#if 0
Heiko Schocher566a4942007-06-22 19:11:54 +0200118 case 64:
119 /* starting Ethernet configuration */
120 status_led_set (0, STATUS_LED_OFF);
121 status_led_set (1, STATUS_LED_OFF);
122 status_led_set (2, STATUS_LED_ON);
123 break;
Heiko Schocher96e1d752007-07-11 18:39:11 +0200124#endif
Heiko Schocher566a4942007-06-22 19:11:54 +0200125 case 80:
126 /* loading Image */
127 status_led_set (0, STATUS_LED_ON);
128 status_led_set (1, STATUS_LED_OFF);
129 status_led_set (2, STATUS_LED_ON);
130 break;
131 }
132}
133#endif
134
Stefan Roesea4c8d132006-06-02 16:18:04 +0200135int board_early_init_f(void)
136{
137 register uint reg;
138
139 set_leds(0); /* display boot info counter */
140
141 /*--------------------------------------------------------------------
142 * Setup the external bus controller/chip selects
143 *-------------------------------------------------------------------*/
144 mtdcr(ebccfga, xbcfg);
145 reg = mfdcr(ebccfgd);
146 mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */
147
148 /*--------------------------------------------------------------------
149 * GPIO's are alreay setup in cpu/ppc4xx/cpu_init.c
150 * via define from board config file.
151 *-------------------------------------------------------------------*/
152
153 /*--------------------------------------------------------------------
154 * Setup the interrupt controller polarities, triggers, etc.
155 *-------------------------------------------------------------------*/
156 mtdcr(uic0sr, 0xffffffff); /* clear all */
157 mtdcr(uic0er, 0x00000000); /* disable all */
158 mtdcr(uic0cr, 0x00000001); /* UIC1 crit is critical */
159 mtdcr(uic0pr, 0xfffffe1f); /* per ref-board manual */
160 mtdcr(uic0tr, 0x01c00000); /* per ref-board manual */
161 mtdcr(uic0vr, 0x00000001); /* int31 highest, base=0x000 */
162 mtdcr(uic0sr, 0xffffffff); /* clear all */
163
164 mtdcr(uic1sr, 0xffffffff); /* clear all */
165 mtdcr(uic1er, 0x00000000); /* disable all */
166 mtdcr(uic1cr, 0x00000000); /* all non-critical */
167 mtdcr(uic1pr, 0xffffe0ff); /* per ref-board manual */
168 mtdcr(uic1tr, 0x00ffc000); /* per ref-board manual */
169 mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */
170 mtdcr(uic1sr, 0xffffffff); /* clear all */
171
172 /*--------------------------------------------------------------------
173 * Setup other serial configuration
174 *-------------------------------------------------------------------*/
175 mfsdr(sdr_pci0, reg);
176 mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */
177 mtsdr(sdr_pfc0, 0x00000100); /* Pin function: enable GPIO49-63 */
178 mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins, select IRQ5 */
179
180 return 0;
181}
182
Heiko Schocher566a4942007-06-22 19:11:54 +0200183#define EEPROM_LEN 256
184void load_sernum_ethaddr (void)
185{
186 int ret;
187 char buf[EEPROM_LEN];
188 char mac[32];
189 char *use_eeprom;
190 u16 checksumcrc16 = 0;
191
192 /* read the MACs from EEprom */
193 status_led_set (0, STATUS_LED_ON);
194 status_led_set (1, STATUS_LED_ON);
195 ret = eeprom_read (CFG_I2C_EEPROM_ADDR, 0, (uchar *)buf, EEPROM_LEN);
196 if (ret == 0) {
197 checksumcrc16 = cyg_crc16 ((uchar *)buf, EEPROM_LEN - 2);
198 /* check, if the EEprom is programmed:
199 * - The Prefix(Byte 0,1,2) is equal to "ATR"
200 * - The checksum, stored in the last 2 Bytes, is correct
201 */
202 if ((strncmp (buf,"ATR",3) != 0) ||
Wolfgang Denk4ef218f2007-07-10 00:01:28 +0200203 ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
204 ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) {
Heiko Schocher566a4942007-06-22 19:11:54 +0200205 /* EEprom is not programmed */
206 printf("%s: EEPROM Checksum not OK\n", __FUNCTION__);
207 } else {
208 /* get the MACs */
Wolfgang Denk4ef218f2007-07-10 00:01:28 +0200209 sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
Heiko Schocher566a4942007-06-22 19:11:54 +0200210 buf[3],
211 buf[4],
212 buf[5],
213 buf[6],
214 buf[7],
215 buf[8]);
216 setenv ("ethaddr", (char *) mac);
Wolfgang Denk4ef218f2007-07-10 00:01:28 +0200217 sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
Heiko Schocher566a4942007-06-22 19:11:54 +0200218 buf[9],
219 buf[10],
220 buf[11],
221 buf[12],
222 buf[13],
223 buf[14]);
224 setenv ("eth1addr", (char *) mac);
225 return;
226 }
227 }
228
229 /* some error reading the EEprom */
230 if ((use_eeprom = getenv ("use_eeprom_ethaddr")) == NULL) {
231 /* dont use bootcmd */
232 setenv("bootdelay", "-1");
233 return;
234 }
235 /* == default ? use standard */
236 if (strncmp (use_eeprom, "default", 7) == 0) {
237 return;
238 }
239 /* Env doesnt exist -> hang */
240 status_led_blink ();
Heiko Schocher90790242007-07-13 08:26:05 +0200241 /* here we do this "handy" because we have no interrupts
242 at this time */
243 puts ("### EEPROM ERROR ### Please RESET the board ###\n");
244 for (;;) {
245 __led_toggle (12);
246 udelay (100000);
247 }
Heiko Schocher566a4942007-06-22 19:11:54 +0200248 return;
249}
250
251#ifdef CONFIG_PREBOOT
252
253static uchar kbd_magic_prefix[] = "key_magic";
254static uchar kbd_command_prefix[] = "key_cmd";
255
256struct kbd_data_t {
257 char s1;
258 char s2;
259};
260
261struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
262{
263 char *val;
264 unsigned long tmp;
265
266 /* use the DIPs for some bootoptions */
267 val = getenv (ENV_NAME_DIP);
268 tmp = simple_strtoul (val, NULL, 16);
269
270 kbd_data->s2 = (tmp & 0x0f);
271 kbd_data->s1 = (tmp & 0xf0) >> 4;
272 return kbd_data;
273}
274
275static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
276{
277 char s1 = str[0];
278
279 if (s1 >= '0' && s1 <= '9')
280 s1 -= '0';
281 else if (s1 >= 'a' && s1 <= 'f')
282 s1 = s1 - 'a' + 10;
283 else if (s1 >= 'A' && s1 <= 'F')
284 s1 = s1 - 'A' + 10;
285 else
286 return -1;
287
288 if (s1 != kbd_data->s1) return -1;
289
290 s1 = str[1];
291 if (s1 >= '0' && s1 <= '9')
292 s1 -= '0';
293 else if (s1 >= 'a' && s1 <= 'f')
294 s1 = s1 - 'a' + 10;
295 else if (s1 >= 'A' && s1 <= 'F')
296 s1 = s1 - 'A' + 10;
297 else
298 return -1;
299
300 if (s1 != kbd_data->s2) return -1;
301 return 0;
302}
303
304static char *key_match (const struct kbd_data_t *kbd_data)
305{
306 char magic[sizeof (kbd_magic_prefix) + 1];
307 char *suffix;
308 char *kbd_magic_keys;
309
310 /*
311 * The following string defines the characters that can be appended
312 * to "key_magic" to form the names of environment variables that
313 * hold "magic" key codes, i. e. such key codes that can cause
314 * pre-boot actions. If the string is empty (""), then only
315 * "key_magic" is checked (old behaviour); the string "125" causes
316 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
317 */
318 if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
319 kbd_magic_keys = "";
320
321 /* loop over all magic keys;
322 * use '\0' suffix in case of empty string
323 */
324 for (suffix = kbd_magic_keys; *suffix ||
325 suffix == kbd_magic_keys; ++suffix) {
326 sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
327 if (compare_magic (kbd_data, getenv (magic)) == 0) {
328 char cmd_name[sizeof (kbd_command_prefix) + 1];
329 char *cmd;
330
331 sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
332 cmd = getenv (cmd_name);
333
334 return (cmd);
335 }
336 }
337 return (NULL);
338}
339
340#endif /* CONFIG_PREBOOT */
341
342static int pcs440ep_readinputs (void)
343{
344 int i;
345 char value[20];
346
347 /* read the inputs and set the Envvars */
348 /* Revision Level Bit 26 - 29 */
349 i = ((in32 (GPIO0_IR) & 0x0000003c) >> 2);
350 i = swapbits[i];
351 sprintf (value, "%02x", i);
352 setenv (ENV_NAME_REVLEV, value);
353 /* Solder Switch Bit 30 - 33 */
354 i = (in32 (GPIO0_IR) & 0x00000003) << 2;
355 i += (in32 (GPIO1_IR) & 0xc0000000) >> 30;
356 i = swapbits[i];
357 sprintf (value, "%02x", i);
358 setenv (ENV_NAME_SOLDER, value);
359 /* DIP Switch Bit 49 - 56 */
360 i = ((in32 (GPIO1_IR) & 0x00007f80) >> 7);
361 i = (swapbits[i & 0x0f] << 4) + swapbits[(i & 0xf0) >> 4];
362 sprintf (value, "%02x", i);
363 setenv (ENV_NAME_DIP, value);
364 return 0;
365}
366
367
368#if defined(CONFIG_SHA1_CHECK_UB_IMG)
369/*************************************************************************
370 * calculate a SHA1 sum for the U-Boot image in Flash.
371 *
372 ************************************************************************/
373static int pcs440ep_sha1 (int docheck)
374{
375 unsigned char *data;
376 unsigned char *ptroff;
377 unsigned char output[20];
378 unsigned char org[20];
379 int i, len = CONFIG_SHA1_LEN;
380
381 memcpy ((char *)CFG_LOAD_ADDR, (char *)CONFIG_SHA1_START, len);
382 data = (unsigned char *)CFG_LOAD_ADDR;
383 ptroff = &data[len + SHA1_SUM_POS];
384
385 for (i = 0; i < SHA1_SUM_LEN; i++) {
386 org[i] = ptroff[i];
387 ptroff[i] = 0;
388 }
Wolfgang Denk4ef218f2007-07-10 00:01:28 +0200389
Heiko Schocher566a4942007-06-22 19:11:54 +0200390 sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
391
392 if (docheck == 2) {
393 for (i = 0; i < 20 ; i++) {
394 printf("%02X ", output[i]);
395 }
396 printf("\n");
397 }
398 if (docheck == 1) {
399 for (i = 0; i < 20 ; i++) {
400 if (org[i] != output[i]) return 1;
401 }
402 }
403 return 0;
404}
405
406/*************************************************************************
407 * do some checks after the SHA1 checksum from the U-Boot Image was
408 * calculated.
409 *
410 ************************************************************************/
411static void pcs440ep_checksha1 (void)
412{
413 int ret;
414 char *cs_test;
415
Heiko Schocher96e1d752007-07-11 18:39:11 +0200416 status_led_set (0, STATUS_LED_OFF);
417 status_led_set (1, STATUS_LED_OFF);
418 status_led_set (2, STATUS_LED_ON);
Heiko Schocher566a4942007-06-22 19:11:54 +0200419 ret = pcs440ep_sha1 (1);
420 if (ret == 0) return;
421
422 if ((cs_test = getenv ("cs_test")) == NULL) {
423 /* Env doesnt exist -> hang */
424 status_led_blink ();
Heiko Schocher90790242007-07-13 08:26:05 +0200425 /* here we do this "handy" because we have no interrupts
426 at this time */
427 puts ("### SHA1 ERROR ### Please RESET the board ###\n");
428 for (;;) {
429 __led_toggle (2);
430 udelay (100000);
431 }
Heiko Schocher566a4942007-06-22 19:11:54 +0200432 }
433
434 if (strncmp (cs_test, "off", 3) == 0) {
435 printf ("SHA1 U-Boot sum NOT ok!\n");
436 setenv ("bootdelay", "-1");
437 }
438}
439#else
440static __inline__ void pcs440ep_checksha1 (void) { do {} while (0);}
441#endif
442
Stefan Roesea4c8d132006-06-02 16:18:04 +0200443int misc_init_r (void)
444{
445 uint pbcr;
446 int size_val = 0;
447
448 /* Re-do sizing to get full correct info */
449 mtdcr(ebccfga, pb0cr);
450 pbcr = mfdcr(ebccfgd);
451 switch (gd->bd->bi_flashsize) {
452 case 1 << 20:
453 size_val = 0;
454 break;
455 case 2 << 20:
456 size_val = 1;
457 break;
458 case 4 << 20:
459 size_val = 2;
460 break;
461 case 8 << 20:
462 size_val = 3;
463 break;
464 case 16 << 20:
465 size_val = 4;
466 break;
467 case 32 << 20:
468 size_val = 5;
469 break;
470 case 64 << 20:
471 size_val = 6;
472 break;
473 case 128 << 20:
474 size_val = 7;
475 break;
476 }
477 pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
478 mtdcr(ebccfga, pb0cr);
479 mtdcr(ebccfgd, pbcr);
480
481 /* adjust flash start and offset */
482 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
483 gd->bd->bi_flashoffset = 0;
484
485 /* Monitor protection ON by default */
486 (void)flash_protect(FLAG_PROTECT_SET,
487 -CFG_MONITOR_LEN,
488 0xffffffff,
489 &flash_info[1]);
490
491 /* Env protection ON by default */
492 (void)flash_protect(FLAG_PROTECT_SET,
493 CFG_ENV_ADDR_REDUND,
494 CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
Stefan Roese4526c872006-06-06 10:59:12 +0200495 &flash_info[1]);
Stefan Roesea4c8d132006-06-02 16:18:04 +0200496
Heiko Schocher566a4942007-06-22 19:11:54 +0200497 pcs440ep_readinputs ();
498 pcs440ep_checksha1 ();
499#ifdef CONFIG_PREBOOT
500 {
501 struct kbd_data_t kbd_data;
502 /* Decode keys */
503 char *str = strdup (key_match (get_keys (&kbd_data)));
504 /* Set or delete definition */
505 setenv ("preboot", str);
506 free (str);
507 }
508#endif /* CONFIG_PREBOOT */
Stefan Roesea4c8d132006-06-02 16:18:04 +0200509 return 0;
510}
511
512int checkboard(void)
513{
514 char *s = getenv("serial#");
515
516 printf("Board: PCS440EP");
517 if (s != NULL) {
518 puts(", serial# ");
519 puts(s);
520 }
521 putc('\n');
522
523 return (0);
524}
525
Heiko Schocher566a4942007-06-22 19:11:54 +0200526void spd_ddr_init_hang (void)
527{
528 status_led_set (0, STATUS_LED_OFF);
529 status_led_set (1, STATUS_LED_ON);
530 /* we cannot use hang() because we are still running from
531 Flash, and so the status_led driver is not initialized */
Heiko Schocher90790242007-07-13 08:26:05 +0200532 puts ("### SDRAM ERROR ### Please RESET the board ###\n");
Heiko Schocher566a4942007-06-22 19:11:54 +0200533 for (;;) {
534 __led_toggle (4);
535 udelay (100000);
536 }
537}
Heiko Schocher566a4942007-06-22 19:11:54 +0200538
Stefan Roesea4c8d132006-06-02 16:18:04 +0200539long int initdram (int board_type)
540{
541 long dram_size = 0;
542
Heiko Schocher566a4942007-06-22 19:11:54 +0200543 status_led_set (0, STATUS_LED_ON);
544 status_led_set (1, STATUS_LED_OFF);
Stefan Roesea4c8d132006-06-02 16:18:04 +0200545 dram_size = spd_sdram();
Heiko Schocher566a4942007-06-22 19:11:54 +0200546 status_led_set (0, STATUS_LED_OFF);
547 status_led_set (1, STATUS_LED_ON);
548 if (dram_size == 0) {
549 hang();
550 }
Stefan Roesea4c8d132006-06-02 16:18:04 +0200551
552 return dram_size;
553}
554
555#if defined(CFG_DRAM_TEST)
556int testdram(void)
557{
558 unsigned long *mem = (unsigned long *)0;
559 const unsigned long kend = (1024 / sizeof(unsigned long));
560 unsigned long k, n;
561
562 mtmsr(0);
563
564 for (k = 0; k < CFG_KBYTES_SDRAM;
565 ++k, mem += (1024 / sizeof(unsigned long))) {
566 if ((k & 1023) == 0) {
567 printf("%3d MB\r", k / 1024);
568 }
569
570 memset(mem, 0xaaaaaaaa, 1024);
571 for (n = 0; n < kend; ++n) {
572 if (mem[n] != 0xaaaaaaaa) {
573 printf("SDRAM test fails at: %08x\n",
574 (uint) & mem[n]);
575 return 1;
576 }
577 }
578
579 memset(mem, 0x55555555, 1024);
580 for (n = 0; n < kend; ++n) {
581 if (mem[n] != 0x55555555) {
582 printf("SDRAM test fails at: %08x\n",
583 (uint) & mem[n]);
584 return 1;
585 }
586 }
587 }
588 printf("SDRAM test passes\n");
589 return 0;
590}
591#endif
592
593/*************************************************************************
594 * pci_pre_init
595 *
596 * This routine is called just prior to registering the hose and gives
597 * the board the opportunity to check things. Returning a value of zero
598 * indicates that things are bad & PCI initialization should be aborted.
599 *
600 * Different boards may wish to customize the pci controller structure
601 * (add regions, override default access routines, etc) or perform
602 * certain pre-initialization actions.
603 *
604 ************************************************************************/
Stefan Roese466fff12007-06-25 15:57:39 +0200605#if defined(CONFIG_PCI)
Stefan Roesea4c8d132006-06-02 16:18:04 +0200606int pci_pre_init(struct pci_controller *hose)
607{
608 unsigned long addr;
609
610 /*-------------------------------------------------------------------------+
611 | Set priority for all PLB3 devices to 0.
612 | Set PLB3 arbiter to fair mode.
613 +-------------------------------------------------------------------------*/
614 mfsdr(sdr_amp1, addr);
615 mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
616 addr = mfdcr(plb3_acr);
617 mtdcr(plb3_acr, addr | 0x80000000);
618
619 /*-------------------------------------------------------------------------+
620 | Set priority for all PLB4 devices to 0.
621 +-------------------------------------------------------------------------*/
622 mfsdr(sdr_amp0, addr);
623 mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
624 addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */
625 mtdcr(plb4_acr, addr);
626
627 /*-------------------------------------------------------------------------+
628 | Set Nebula PLB4 arbiter to fair mode.
629 +-------------------------------------------------------------------------*/
630 /* Segment0 */
631 addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
632 addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
633 addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
634 addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep;
635 mtdcr(plb0_acr, addr);
636
637 /* Segment1 */
638 addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
639 addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
640 addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
641 addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
642 mtdcr(plb1_acr, addr);
643
644 return 1;
645}
Stefan Roese466fff12007-06-25 15:57:39 +0200646#endif /* defined(CONFIG_PCI) */
Stefan Roesea4c8d132006-06-02 16:18:04 +0200647
648/*************************************************************************
649 * pci_target_init
650 *
651 * The bootstrap configuration provides default settings for the pci
652 * inbound map (PIM). But the bootstrap config choices are limited and
653 * may not be sufficient for a given board.
654 *
655 ************************************************************************/
656#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
657void pci_target_init(struct pci_controller *hose)
658{
659 /*--------------------------------------------------------------------------+
660 * Set up Direct MMIO registers
661 *--------------------------------------------------------------------------*/
662 /*--------------------------------------------------------------------------+
663 | PowerPC440 EP PCI Master configuration.
664 | Map one 1Gig range of PLB/processor addresses to PCI memory space.
665 | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
666 | Use byte reversed out routines to handle endianess.
667 | Make this region non-prefetchable.
668 +--------------------------------------------------------------------------*/
669 out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
670 out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE); /* PMM0 Local Address */
671 out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE); /* PMM0 PCI Low Address */
672 out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
673 out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
674
675 out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
676 out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */
677 out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2); /* PMM0 PCI Low Address */
678 out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
679 out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
680
681 out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
682 out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */
683 out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */
684 out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */
685
686 /*--------------------------------------------------------------------------+
687 * Set up Configuration registers
688 *--------------------------------------------------------------------------*/
689
690 /* Program the board's subsystem id/vendor id */
691 pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
692 CFG_PCI_SUBSYS_VENDORID);
693 pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID);
694
695 /* Configure command register as bus master */
696 pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
697
698 /* 240nS PCI clock */
699 pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
700
701 /* No error reporting */
702 pci_write_config_word(0, PCI_ERREN, 0);
703
704 pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
705
706}
707#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
708
709/*************************************************************************
710 * pci_master_init
711 *
712 ************************************************************************/
713#if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
714void pci_master_init(struct pci_controller *hose)
715{
716 unsigned short temp_short;
717
718 /*--------------------------------------------------------------------------+
719 | Write the PowerPC440 EP PCI Configuration regs.
720 | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
721 | Enable PowerPC440 EP to act as a PCI memory target (PTM).
722 +--------------------------------------------------------------------------*/
723 pci_read_config_word(0, PCI_COMMAND, &temp_short);
724 pci_write_config_word(0, PCI_COMMAND,
725 temp_short | PCI_COMMAND_MASTER |
726 PCI_COMMAND_MEMORY);
727}
728#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
729
730/*************************************************************************
731 * is_pci_host
732 *
733 * This routine is called to determine if a pci scan should be
734 * performed. With various hardware environments (especially cPCI and
735 * PPMC) it's insufficient to depend on the state of the arbiter enable
736 * bit in the strap register, or generic host/adapter assumptions.
737 *
738 * Rather than hard-code a bad assumption in the general 440 code, the
739 * 440 pci code requires the board to decide at runtime.
740 *
741 * Return 0 for adapter mode, non-zero for host (monarch) mode.
742 *
743 *
744 ************************************************************************/
745#if defined(CONFIG_PCI)
746int is_pci_host(struct pci_controller *hose)
747{
748 /* PCS440EP is always configured as host. */
749 return (1);
750}
751#endif /* defined(CONFIG_PCI) */
752
753/*************************************************************************
754 * hw_watchdog_reset
755 *
756 * This routine is called to reset (keep alive) the watchdog timer
757 *
758 ************************************************************************/
759#if defined(CONFIG_HW_WATCHDOG)
760void hw_watchdog_reset(void)
761{
762
763}
764#endif
Heiko Schocher566a4942007-06-22 19:11:54 +0200765
766/*************************************************************************
767 * "led" Commando for the U-Boot shell
768 *
769 ************************************************************************/
770int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
771{
Heiko Schocher96e1d752007-07-11 18:39:11 +0200772 int rcode = 0, i;
Heiko Schocher566a4942007-06-22 19:11:54 +0200773 ulong pattern = 0;
774
Heiko Schocher96e1d752007-07-11 18:39:11 +0200775 pattern = simple_strtoul (argv[1], NULL, 16);
776 if (pattern > 0x400) {
777 int val = GET_LEDS;
778 printf ("led: %x\n", val);
779 return rcode;
780 }
781 if (pattern > 0x200) {
Heiko Schocher566a4942007-06-22 19:11:54 +0200782 status_led_blink ();
783 hang ();
784 return rcode;
785 }
Heiko Schocher96e1d752007-07-11 18:39:11 +0200786 if (pattern > 0x100) {
Heiko Schocher566a4942007-06-22 19:11:54 +0200787 status_led_blink ();
788 return rcode;
789 }
790 pattern &= 0x0f;
Heiko Schocher96e1d752007-07-11 18:39:11 +0200791 for (i = 0; i < 4; i++) {
792 if (pattern & 0x01) status_led_set (i, STATUS_LED_ON);
793 else status_led_set (i, STATUS_LED_OFF);
794 pattern = pattern >> 1;
795 }
Heiko Schocher566a4942007-06-22 19:11:54 +0200796 return rcode;
797}
798
799U_BOOT_CMD(
800 led, 2, 1, do_led,
Heiko Schocher96e1d752007-07-11 18:39:11 +0200801 "led [bitmask] - set the DIAG-LED\n",
802 "[bitmask] 0x01 = DIAG 1 on\n"
803 " 0x02 = DIAG 2 on\n"
804 " 0x04 = DIAG 3 on\n"
805 " 0x08 = DIAG 4 on\n"
806 " > 0x100 set the LED, who are on, to state blinking\n"
Heiko Schocher566a4942007-06-22 19:11:54 +0200807);
808
809#if defined(CONFIG_SHA1_CHECK_UB_IMG)
810/*************************************************************************
811 * "sha1" Commando for the U-Boot shell
812 *
813 ************************************************************************/
814int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
815{
816 int rcode = -1;
817
818 if (argc < 2) {
819 usage:
820 printf ("Usage:\n%s\n", cmdtp->usage);
821 return 1;
822 }
823
824 if (argc >= 3) {
825 unsigned char *data;
826 unsigned char output[20];
827 int len;
828 int i;
Wolfgang Denk4ef218f2007-07-10 00:01:28 +0200829
Heiko Schocher566a4942007-06-22 19:11:54 +0200830 data = (unsigned char *)simple_strtoul (argv[1], NULL, 16);
831 len = simple_strtoul (argv[2], NULL, 16);
832 sha1_csum (data, len, (unsigned char *)output);
833 printf ("U-Boot sum:\n");
834 for (i = 0; i < 20 ; i++) {
835 printf ("%02X ", output[i]);
836 }
837 printf ("\n");
838 if (argc == 4) {
839 data = (unsigned char *)simple_strtoul (argv[3], NULL, 16);
840 memcpy (data, output, 20);
841 }
842 return 0;
843 }
844 if (argc == 2) {
845 char *ptr = argv[1];
846 if (*ptr != '-') goto usage;
847 ptr++;
848 if ((*ptr == 'c') || (*ptr == 'C')) {
849 rcode = pcs440ep_sha1 (1);
850 printf ("SHA1 U-Boot sum %sok!\n", (rcode != 0) ? "not " : "");
851 } else if ((*ptr == 'p') || (*ptr == 'P')) {
852 rcode = pcs440ep_sha1 (2);
853 } else {
854 rcode = pcs440ep_sha1 (0);
855 }
Wolfgang Denk4ef218f2007-07-10 00:01:28 +0200856 return rcode;
Heiko Schocher566a4942007-06-22 19:11:54 +0200857 }
858 return rcode;
859}
860
861U_BOOT_CMD(
862 sha1, 4, 1, do_sha1,
863 "sha1 - calculate the SHA1 Sum\n",
864 "address len [addr] calculate the SHA1 sum [save at addr]\n"
865 " -p calculate the SHA1 sum from the U-Boot image in flash and print\n"
866 " -c check the U-Boot image in flash\n"
867);
868#endif
869
870#ifdef CONFIG_IDE_PREINIT
871int ide_preinit (void)
872{
873 /* Set True IDE Mode */
874 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00100000));
875 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
876 out32 (GPIO1_OR, (in32 (GPIO1_OR) & ~0x00008040));
877 udelay (100000);
878 return 0;
879}
880#endif
881
882#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
883void ide_set_reset (int idereset)
884{
885 debug ("ide_reset(%d)\n", idereset);
886 if (idereset == 0) {
887 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
888 } else {
889 out32 (GPIO0_OR, (in32 (GPIO0_OR) & ~0x00200000));
890 }
891 udelay (10000);
892}
893#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */