| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SOCFPGA=y | ||||
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | ||||
| 4 | CONFIG_SPL_DM=y | ||||
| 5 | CONFIG_DM_GPIO=y | ||||
| 6 | CONFIG_TARGET_SOCFPGA_SR1500=y | ||||
| Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 7 | CONFIG_SPL_STACK_R_ADDR=0x00800000 |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" |
| 9 | CONFIG_SPL=y | ||||
| 10 | CONFIG_SPL_STACK_R=y | ||||
| Simon Glass | 73223f0 | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 11 | CONFIG_FIT=y |
| Tom Rini | adad96e | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 12 | CONFIG_HUSH_PARSER=y |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame^] | 13 | CONFIG_CMD_BOOTZ=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 14 | # CONFIG_CMD_IMLS is not set |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame^] | 15 | CONFIG_CMD_ASKENV=y |
| 16 | CONFIG_CMD_GREPENV=y | ||||
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 17 | CONFIG_CMD_MEMTEST=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 18 | # CONFIG_CMD_FLASH is not set |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame^] | 19 | CONFIG_CMD_MMC=y |
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 20 | CONFIG_CMD_SF=y |
| 21 | CONFIG_CMD_SPI=y | ||||
| 22 | CONFIG_CMD_I2C=y | ||||
| 23 | CONFIG_CMD_GPIO=y | ||||
| 24 | CONFIG_CMD_DHCP=y | ||||
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame^] | 25 | CONFIG_CMD_MII=y |
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 26 | CONFIG_CMD_PING=y |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame^] | 27 | CONFIG_CMD_CACHE=y |
| Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 28 | CONFIG_CMD_TIME=y |
| Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame^] | 29 | CONFIG_CMD_EXT4=y |
| 30 | CONFIG_CMD_EXT4_WRITE=y | ||||
| 31 | CONFIG_CMD_FAT=y | ||||
| 32 | CONFIG_CMD_FS_GENERIC=y | ||||
| Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 33 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 34 | CONFIG_DWAPB_GPIO=y |
| Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 35 | CONFIG_DM_MMC=y |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 36 | CONFIG_SPI_FLASH=y |
| Tom Rini | adad96e | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 37 | CONFIG_SPI_FLASH_BAR=y |
| Stefan Roese | 93d9fc2 | 2016-03-03 16:57:39 +0100 | [diff] [blame] | 38 | CONFIG_SPI_FLASH_STMICRO=y |
| Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 39 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| Stefan Roese | ae9996c | 2015-11-18 11:06:09 +0100 | [diff] [blame] | 40 | CONFIG_DM_ETH=y |
| 41 | CONFIG_ETH_DESIGNWARE=y | ||||
| 42 | CONFIG_SYS_NS16550=y | ||||
| Stefan Roese | 93d9fc2 | 2016-03-03 16:57:39 +0100 | [diff] [blame] | 43 | CONFIG_CADENCE_QSPI=y |