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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stefano Babic92e30c02011-11-30 23:56:53 +00002/*
3 * Copyright (C) 2011
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
5 *
6 * Copyright (C) 2009 TechNexion Ltd.
Stefano Babic92e30c02011-11-30 23:56:53 +00007 */
8
9#include <common.h>
10#include <netdev.h>
11#include <asm/io.h>
12#include <asm/arch/mem.h>
13#include <asm/arch/mux.h>
14#include <asm/arch/sys_proto.h>
15#include <asm/omap_gpio.h>
16#include <asm/arch/mmc_host_def.h>
17#include <i2c.h>
Jeroen Hofstee522a4ae2014-10-08 22:57:58 +020018#include <spl.h>
19#include <mmc.h>
Stefano Babic92e30c02011-11-30 23:56:53 +000020#include <asm/gpio.h>
Stefano Babic8c589d62012-02-07 23:28:58 +000021#include <usb.h>
22#include <asm/ehci-omap.h>
Stefano Babic92e30c02011-11-30 23:56:53 +000023#include "twister.h"
24
25DECLARE_GLOBAL_DATA_PTR;
26
27/* Timing definitions for Ethernet Controller */
28static const u32 gpmc_smc911[] = {
29 NET_GPMC_CONFIG1,
30 NET_GPMC_CONFIG2,
31 NET_GPMC_CONFIG3,
32 NET_GPMC_CONFIG4,
33 NET_GPMC_CONFIG5,
34 NET_GPMC_CONFIG6,
35};
36
37static const u32 gpmc_XR16L2751[] = {
38 XR16L2751_GPMC_CONFIG1,
39 XR16L2751_GPMC_CONFIG2,
40 XR16L2751_GPMC_CONFIG3,
41 XR16L2751_GPMC_CONFIG4,
42 XR16L2751_GPMC_CONFIG5,
43 XR16L2751_GPMC_CONFIG6,
44};
45
Ladislav Michl9b0888c2018-05-14 09:17:45 +020046#ifdef CONFIG_USB_EHCI_OMAP
Stefano Babic8c589d62012-02-07 23:28:58 +000047static struct omap_usbhs_board_data usbhs_bdata = {
48 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
49 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
50 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
51};
52
Troy Kisky127efc42013-10-10 15:27:57 -070053int ehci_hcd_init(int index, enum usb_init_type init,
54 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Stefano Babic8c589d62012-02-07 23:28:58 +000055{
Mateusz Zalega16297cf2013-10-04 19:22:26 +020056 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
Stefano Babic8c589d62012-02-07 23:28:58 +000057}
58
Lucas Stach676ae062012-09-26 00:14:35 +020059int ehci_hcd_stop(int index)
Stefano Babic8c589d62012-02-07 23:28:58 +000060{
61 return omap_ehci_hcd_stop();
62}
63#endif
64
Stefano Babic92e30c02011-11-30 23:56:53 +000065int board_init(void)
66{
67 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
68
69 /* boot param addr */
70 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
71
72 /* Chip select 1 and 3 are used for XR16L2751 UART controller */
73 enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1],
74 XR16L2751_UART1_BASE, GPMC_SIZE_16M);
75
76 enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3],
77 XR16L2751_UART2_BASE, GPMC_SIZE_16M);
78
79 gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET");
80 gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1);
81
82 return 0;
83}
84
Stefano Babic31f5b652012-11-23 05:19:25 +000085#ifndef CONFIG_SPL_BUILD
Stefano Babic92e30c02011-11-30 23:56:53 +000086int misc_init_r(void)
87{
Stefano Babic0b26b872012-08-29 01:22:00 +000088 char *eth_addr;
Stefano Babic31f5b652012-11-23 05:19:25 +000089 struct tam3517_module_info info;
90 int ret;
Stefano Babic0b26b872012-08-29 01:22:00 +000091
Paul Kocialkowski679f82c2015-08-27 19:37:13 +020092 omap_die_id_display();
Stefano Babic92e30c02011-11-30 23:56:53 +000093
Simon Glass00caae62017-08-03 12:22:12 -060094 eth_addr = env_get("ethaddr");
Stefano Babic0b26b872012-08-29 01:22:00 +000095 if (eth_addr)
96 return 0;
97
Stefano Babic31f5b652012-11-23 05:19:25 +000098 TAM3517_READ_EEPROM(&info, ret);
99 if (!ret)
100 TAM3517_READ_MAC_FROM_EEPROM(&info);
Stefano Babic0b26b872012-08-29 01:22:00 +0000101
Stefano Babic92e30c02011-11-30 23:56:53 +0000102 return 0;
103}
Stefano Babic31f5b652012-11-23 05:19:25 +0000104#endif
Stefano Babic92e30c02011-11-30 23:56:53 +0000105
106/*
107 * Routine: set_muxconf_regs
108 * Description: Setting up the configuration Mux registers specific to the
109 * hardware. Many pins need to be moved from protect to primary
110 * mode.
111 */
112void set_muxconf_regs(void)
113{
114 MUX_TWISTER();
115}
116
117int board_eth_init(bd_t *bis)
118{
Ladislav Michl9b0888c2018-05-14 09:17:45 +0200119#ifdef CONFIG_DRIVER_TI_EMAC
Stefano Babic92e30c02011-11-30 23:56:53 +0000120 davinci_emac_initialize();
Ladislav Michl9b0888c2018-05-14 09:17:45 +0200121#endif
Stefano Babic92e30c02011-11-30 23:56:53 +0000122 /* init cs for extern lan */
123 enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
124 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
Ladislav Michl9b0888c2018-05-14 09:17:45 +0200125#ifdef CONFIG_SMC911X
126 return smc911x_initialize(0, CONFIG_SMC911X_BASE);
127#else
Stefano Babic92e30c02011-11-30 23:56:53 +0000128 return 0;
Ladislav Michl9b0888c2018-05-14 09:17:45 +0200129#endif
Stefano Babic92e30c02011-11-30 23:56:53 +0000130}
131
Ladislav Michl9b0888c2018-05-14 09:17:45 +0200132#if defined(CONFIG_MMC_OMAP_HS)
Stefano Babic92e30c02011-11-30 23:56:53 +0000133int board_mmc_init(bd_t *bis)
134{
Nikita Kiryanove3913f52012-12-03 02:19:47 +0000135 return omap_mmc_init(0, 0, 0, -1, -1);
Stefano Babic92e30c02011-11-30 23:56:53 +0000136}
137#endif
Stefano Babic84c21fb2012-03-15 04:01:44 +0000138
139#ifdef CONFIG_SPL_OS_BOOT
140/*
Robert P. J. Dayfc0b5942016-09-07 14:27:59 -0400141 * Do board specific preparation before SPL
Stefano Babic84c21fb2012-03-15 04:01:44 +0000142 * Linux boot
143 */
144void spl_board_prepare_for_linux(void)
145{
146 /* init cs for extern lan */
147 enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
148 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
149}
150int spl_start_uboot(void)
151{
152 int val = 0;
Stefano Babic30372962013-02-23 00:53:26 +0000153 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
154 gpio_direction_input(SPL_OS_BOOT_KEY);
155 val = gpio_get_value(SPL_OS_BOOT_KEY);
156 gpio_free(SPL_OS_BOOT_KEY);
Stefano Babic84c21fb2012-03-15 04:01:44 +0000157 }
158 return val;
159}
160#endif