blob: 216932046bc253d71fa2567e4e0377066d7763c6 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eddy Petrișor9702ec02016-06-05 03:43:00 +03002/*
3 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
4 *
Eddy Petrișor9702ec02016-06-05 03:43:00 +03005 * Configuration settings for the Freescale S32V234 EVB board.
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Eddy Petrișor9702ec02016-06-05 03:43:00 +030011#include <asm/arch/imx-regs.h>
12
13#define CONFIG_S32V234
Eddy Petrișor9702ec02016-06-05 03:43:00 +030014
Eddy Petrișor9702ec02016-06-05 03:43:00 +030015/* Config GIC */
16#define CONFIG_GICV2
17#define GICD_BASE 0x7D001000
18#define GICC_BASE 0x7D002000
19
20#define CONFIG_REMAKE_ELF
21#undef CONFIG_RUN_FROM_IRAM_ONLY
22
23#define CONFIG_RUN_FROM_DDR1
24#undef CONFIG_RUN_FROM_DDR0
25
26/* Run by default from DDR1 */
27#ifdef CONFIG_RUN_FROM_DDR0
28#define DDR_BASE_ADDR 0x80000000
29#else
30#define DDR_BASE_ADDR 0xC0000000
31#endif
32
33#define CONFIG_MACH_TYPE 4146
34
35#define CONFIG_SKIP_LOWLEVEL_INIT
36
37/* Config CACHE */
38#define CONFIG_CMD_CACHE
39
40#define CONFIG_SYS_FULL_VA
41
42/* Enable passing of ATAGs */
43#define CONFIG_CMDLINE_TAG
44
45/* SMP Spin Table Definitions */
46#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
47
48/* Generic Timer Definitions */
49#define COUNTER_FREQUENCY (1000000000) /* 1000MHz */
50#define CONFIG_SYS_FSL_ERRATUM_A008585
51
52/* Size of malloc() pool */
53#ifdef CONFIG_RUN_FROM_IRAM_ONLY
54#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
55#else
56#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
57#endif
Eddy Petrișor9702ec02016-06-05 03:43:00 +030058
Eddy Petrișor9702ec02016-06-05 03:43:00 +030059#define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR
60
61#define CONFIG_DEBUG_UART_LINFLEXUART
62#define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE
63
64/* Allow to overwrite serial and ethaddr */
65#define CONFIG_ENV_OVERWRITE
66#define CONFIG_SYS_UART_PORT (1)
Eddy Petrișor9702ec02016-06-05 03:43:00 +030067
Eddy Petrișor9702ec02016-06-05 03:43:00 +030068#define CONFIG_FSL_USDHC
69#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR
70#define CONFIG_SYS_FSL_ESDHC_NUM 1
71
Eddy Petrișor9702ec02016-06-05 03:43:00 +030072#define CONFIG_CMD_MMC
Eddy Petrișor9702ec02016-06-05 03:43:00 +030073/* #define CONFIG_CMD_EXT2 EXT2 Support */
Eddy Petrișor9702ec02016-06-05 03:43:00 +030074
75#if 0
76
77/* Ethernet config */
Eddy Petrișor9702ec02016-06-05 03:43:00 +030078#define CONFIG_CMD_MII
79#define CONFIG_FEC_MXC
Eddy Petrișor9702ec02016-06-05 03:43:00 +030080#define IMX_FEC_BASE ENET_BASE_ADDR
81#define CONFIG_FEC_XCV_TYPE RMII
82#define CONFIG_FEC_MXC_PHYADDR 0
Eddy Petrișor9702ec02016-06-05 03:43:00 +030083#endif
84
Eddy Petrișor9702ec02016-06-05 03:43:00 +030085#if 0 /* Disable until the FLASH will be implemented */
86#define CONFIG_SYS_USE_NAND
87#endif
88
89#ifdef CONFIG_SYS_USE_NAND
90/* Nand Flash Configs */
Eddy Petrișor9702ec02016-06-05 03:43:00 +030091#define CONFIG_JFFS2_NAND
92#define MTD_NAND_FSL_NFC_SWECC 1
93#define CONFIG_NAND_FSL_NFC
94#define CONFIG_SYS_NAND_BASE 0x400E0000
95#define CONFIG_SYS_MAX_NAND_DEVICE 1
96#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
97#define CONFIG_SYS_NAND_SELECT_DEVICE
98#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
99#endif
100
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300101#define CONFIG_LOADADDR 0xC307FFC0
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300102
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300103#define CONFIG_EXTRA_ENV_SETTINGS \
104 "boot_scripts=boot.scr.uimg boot.scr\0" \
105 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
106 "console=ttyLF0,115200\0" \
107 "fdt_file=s32v234-evb.dtb\0" \
108 "fdt_high=0xffffffff\0" \
109 "initrd_high=0xffffffff\0" \
110 "fdt_addr_r=0xC2000000\0" \
111 "kernel_addr_r=0xC307FFC0\0" \
112 "ramdisk_addr_r=0xC4000000\0" \
113 "ramdisk=rootfs.uimg\0"\
114 "ip_dyn=yes\0" \
115 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
116 "update_sd_firmware_filename=u-boot.imx\0" \
117 "update_sd_firmware=" \
118 "if test ${ip_dyn} = yes; then " \
119 "setenv get_cmd dhcp; " \
120 "else " \
121 "setenv get_cmd tftp; " \
122 "fi; " \
123 "if mmc dev ${mmcdev}; then " \
124 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
125 "setexpr fw_sz ${filesize} / 0x200; " \
126 "setexpr fw_sz ${fw_sz} + 1; " \
127 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
128 "fi; " \
129 "fi\0" \
130 "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
131 "jtagboot=echo Booting using jtag...; " \
132 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
133 "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
134 "run loaduimage; run loadramdisk; run loadfdt;"\
135 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
136 "boot_net_usb_start=true\0" \
137 BOOTENV
138
139#define BOOT_TARGET_DEVICES(func) \
140 func(MMC, mmc, 1) \
141 func(MMC, mmc, 0) \
142 func(DHCP, dhcp, na)
143
144#define CONFIG_BOOTCOMMAND \
145 "run distro_bootcmd"
146
147#include <config_distro_bootcmd.h>
148
149/* Miscellaneous configurable options */
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300150#define CONFIG_SYS_PROMPT "=> "
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300151
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300152#define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR)
153#define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000)
154
155#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
156#define CONFIG_SYS_HZ 1000
157
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300158#ifdef CONFIG_RUN_FROM_IRAM_ONLY
159#define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR)
160#endif
161
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300162#if 0
163/* Configure PXE */
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300164#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
165#endif
166
167/* Physical memory map */
168/* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300169#define PHYS_SDRAM (DDR_BASE_ADDR)
170#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
171
172#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
173#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
174#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
175
176#define CONFIG_SYS_INIT_SP_OFFSET \
177 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
178#define CONFIG_SYS_INIT_SP_ADDR \
179 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
180
Masahiro Yamadae856bdc2017-02-11 22:43:54 +0900181/* environment organization */
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300182#define CONFIG_ENV_SIZE (8 * 1024)
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300183
184#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
185#define CONFIG_SYS_MMC_ENV_DEV 0
186
187
188#define CONFIG_BOOTP_BOOTFILESIZE
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300189
190#endif