blob: 7e4b2c9c69ed50dac3dc2692514a6a84cd7d6176 [file] [log] [blame]
Wolfgang Denkf93ae782006-10-24 14:31:24 +02001/*
2 * Register definitions for the Atmel USART3 module.
3 *
4 * Copyright (C) 2005-2006 Atmel Corporation
5 *
Andreas Bießmann125637c2010-09-03 10:28:05 +02006 * Modified to support C structure SoC access by
7 * Andreas Bießmann <biessmann@corscience.de>
8 *
Wolfgang Denkf93ae782006-10-24 14:31:24 +02009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23#ifndef __DRIVERS_ATMEL_USART_H__
24#define __DRIVERS_ATMEL_USART_H__
25
Andreas Bießmann125637c2010-09-03 10:28:05 +020026/* USART3 register footprint */
27typedef struct atmel_usart3 {
28 u32 cr;
29 u32 mr;
30 u32 ier;
31 u32 idr;
32 u32 imr;
33 u32 csr;
34 u32 rhr;
35 u32 thr;
36 u32 brgr;
37 u32 rtor;
38 u32 ttgr;
39 u32 reserved0[5];
40 u32 fidi;
41 u32 ner;
42 u32 reserved1;
43 u32 ifr;
44 u32 man;
Wolfgang Denk071bc922010-10-27 22:48:30 +020045 u32 reserved2[54]; /* version and PDC not needed */
Andreas Bießmann125637c2010-09-03 10:28:05 +020046} atmel_usart3_t;
Wolfgang Denkf93ae782006-10-24 14:31:24 +020047
48/* Bitfields in CR */
49#define USART3_RSTRX_OFFSET 2
50#define USART3_RSTRX_SIZE 1
51#define USART3_RSTTX_OFFSET 3
52#define USART3_RSTTX_SIZE 1
53#define USART3_RXEN_OFFSET 4
54#define USART3_RXEN_SIZE 1
55#define USART3_RXDIS_OFFSET 5
56#define USART3_RXDIS_SIZE 1
57#define USART3_TXEN_OFFSET 6
58#define USART3_TXEN_SIZE 1
59#define USART3_TXDIS_OFFSET 7
60#define USART3_TXDIS_SIZE 1
61#define USART3_RSTSTA_OFFSET 8
62#define USART3_RSTSTA_SIZE 1
63#define USART3_STTBRK_OFFSET 9
64#define USART3_STTBRK_SIZE 1
65#define USART3_STPBRK_OFFSET 10
66#define USART3_STPBRK_SIZE 1
67#define USART3_STTTO_OFFSET 11
68#define USART3_STTTO_SIZE 1
69#define USART3_SENDA_OFFSET 12
70#define USART3_SENDA_SIZE 1
71#define USART3_RSTIT_OFFSET 13
72#define USART3_RSTIT_SIZE 1
73#define USART3_RSTNACK_OFFSET 14
74#define USART3_RSTNACK_SIZE 1
75#define USART3_RETTO_OFFSET 15
76#define USART3_RETTO_SIZE 1
77#define USART3_DTREN_OFFSET 16
78#define USART3_DTREN_SIZE 1
79#define USART3_DTRDIS_OFFSET 17
80#define USART3_DTRDIS_SIZE 1
81#define USART3_RTSEN_OFFSET 18
82#define USART3_RTSEN_SIZE 1
83#define USART3_RTSDIS_OFFSET 19
84#define USART3_RTSDIS_SIZE 1
85#define USART3_COMM_TX_OFFSET 30
86#define USART3_COMM_TX_SIZE 1
87#define USART3_COMM_RX_OFFSET 31
88#define USART3_COMM_RX_SIZE 1
89
90/* Bitfields in MR */
91#define USART3_USART_MODE_OFFSET 0
92#define USART3_USART_MODE_SIZE 4
93#define USART3_USCLKS_OFFSET 4
94#define USART3_USCLKS_SIZE 2
95#define USART3_CHRL_OFFSET 6
96#define USART3_CHRL_SIZE 2
97#define USART3_SYNC_OFFSET 8
98#define USART3_SYNC_SIZE 1
99#define USART3_PAR_OFFSET 9
100#define USART3_PAR_SIZE 3
101#define USART3_NBSTOP_OFFSET 12
102#define USART3_NBSTOP_SIZE 2
103#define USART3_CHMODE_OFFSET 14
104#define USART3_CHMODE_SIZE 2
105#define USART3_MSBF_OFFSET 16
106#define USART3_MSBF_SIZE 1
107#define USART3_MODE9_OFFSET 17
108#define USART3_MODE9_SIZE 1
109#define USART3_CLKO_OFFSET 18
110#define USART3_CLKO_SIZE 1
111#define USART3_OVER_OFFSET 19
112#define USART3_OVER_SIZE 1
113#define USART3_INACK_OFFSET 20
114#define USART3_INACK_SIZE 1
115#define USART3_DSNACK_OFFSET 21
116#define USART3_DSNACK_SIZE 1
117#define USART3_MAX_ITERATION_OFFSET 24
118#define USART3_MAX_ITERATION_SIZE 3
119#define USART3_FILTER_OFFSET 28
120#define USART3_FILTER_SIZE 1
121
122/* Bitfields in CSR */
123#define USART3_RXRDY_OFFSET 0
124#define USART3_RXRDY_SIZE 1
125#define USART3_TXRDY_OFFSET 1
126#define USART3_TXRDY_SIZE 1
127#define USART3_RXBRK_OFFSET 2
128#define USART3_RXBRK_SIZE 1
129#define USART3_ENDRX_OFFSET 3
130#define USART3_ENDRX_SIZE 1
131#define USART3_ENDTX_OFFSET 4
132#define USART3_ENDTX_SIZE 1
133#define USART3_OVRE_OFFSET 5
134#define USART3_OVRE_SIZE 1
135#define USART3_FRAME_OFFSET 6
136#define USART3_FRAME_SIZE 1
137#define USART3_PARE_OFFSET 7
138#define USART3_PARE_SIZE 1
139#define USART3_TIMEOUT_OFFSET 8
140#define USART3_TIMEOUT_SIZE 1
141#define USART3_TXEMPTY_OFFSET 9
142#define USART3_TXEMPTY_SIZE 1
143#define USART3_ITERATION_OFFSET 10
144#define USART3_ITERATION_SIZE 1
145#define USART3_TXBUFE_OFFSET 11
146#define USART3_TXBUFE_SIZE 1
147#define USART3_RXBUFF_OFFSET 12
148#define USART3_RXBUFF_SIZE 1
149#define USART3_NACK_OFFSET 13
150#define USART3_NACK_SIZE 1
151#define USART3_RIIC_OFFSET 16
152#define USART3_RIIC_SIZE 1
153#define USART3_DSRIC_OFFSET 17
154#define USART3_DSRIC_SIZE 1
155#define USART3_DCDIC_OFFSET 18
156#define USART3_DCDIC_SIZE 1
157#define USART3_CTSIC_OFFSET 19
158#define USART3_CTSIC_SIZE 1
159#define USART3_RI_OFFSET 20
160#define USART3_RI_SIZE 1
161#define USART3_DSR_OFFSET 21
162#define USART3_DSR_SIZE 1
163#define USART3_DCD_OFFSET 22
164#define USART3_DCD_SIZE 1
165#define USART3_CTS_OFFSET 23
166#define USART3_CTS_SIZE 1
167
168/* Bitfields in RHR */
169#define USART3_RXCHR_OFFSET 0
170#define USART3_RXCHR_SIZE 9
171
172/* Bitfields in THR */
173#define USART3_TXCHR_OFFSET 0
174#define USART3_TXCHR_SIZE 9
175
176/* Bitfields in BRGR */
177#define USART3_CD_OFFSET 0
178#define USART3_CD_SIZE 16
179
180/* Bitfields in RTOR */
181#define USART3_TO_OFFSET 0
182#define USART3_TO_SIZE 16
183
184/* Bitfields in TTGR */
185#define USART3_TG_OFFSET 0
186#define USART3_TG_SIZE 8
187
188/* Bitfields in FIDI */
189#define USART3_FI_DI_RATIO_OFFSET 0
190#define USART3_FI_DI_RATIO_SIZE 11
191
192/* Bitfields in NER */
193#define USART3_NB_ERRORS_OFFSET 0
194#define USART3_NB_ERRORS_SIZE 8
195
196/* Bitfields in XXR */
197#define USART3_XOFF_OFFSET 0
198#define USART3_XOFF_SIZE 8
199#define USART3_XON_OFFSET 8
200#define USART3_XON_SIZE 8
201
202/* Bitfields in IFR */
203#define USART3_IRDA_FILTER_OFFSET 0
204#define USART3_IRDA_FILTER_SIZE 8
205
206/* Bitfields in RCR */
207#define USART3_RXCTR_OFFSET 0
208#define USART3_RXCTR_SIZE 16
209
210/* Bitfields in TCR */
211#define USART3_TXCTR_OFFSET 0
212#define USART3_TXCTR_SIZE 16
213
214/* Bitfields in RNCR */
215#define USART3_RXNCR_OFFSET 0
216#define USART3_RXNCR_SIZE 16
217
218/* Bitfields in TNCR */
219#define USART3_TXNCR_OFFSET 0
220#define USART3_TXNCR_SIZE 16
221
222/* Bitfields in PTCR */
223#define USART3_RXTEN_OFFSET 0
224#define USART3_RXTEN_SIZE 1
225#define USART3_RXTDIS_OFFSET 1
226#define USART3_RXTDIS_SIZE 1
227#define USART3_TXTEN_OFFSET 8
228#define USART3_TXTEN_SIZE 1
229#define USART3_TXTDIS_OFFSET 9
230#define USART3_TXTDIS_SIZE 1
231
232/* Constants for USART_MODE */
233#define USART3_USART_MODE_NORMAL 0
234#define USART3_USART_MODE_RS485 1
235#define USART3_USART_MODE_HARDWARE 2
236#define USART3_USART_MODE_MODEM 3
237#define USART3_USART_MODE_ISO7816_T0 4
238#define USART3_USART_MODE_ISO7816_T1 6
239#define USART3_USART_MODE_IRDA 8
240
241/* Constants for USCLKS */
242#define USART3_USCLKS_MCK 0
243#define USART3_USCLKS_MCK_DIV 1
244#define USART3_USCLKS_SCK 3
245
246/* Constants for CHRL */
247#define USART3_CHRL_5 0
248#define USART3_CHRL_6 1
249#define USART3_CHRL_7 2
250#define USART3_CHRL_8 3
251
252/* Constants for PAR */
253#define USART3_PAR_EVEN 0
254#define USART3_PAR_ODD 1
255#define USART3_PAR_SPACE 2
256#define USART3_PAR_MARK 3
257#define USART3_PAR_NONE 4
258#define USART3_PAR_MULTI 6
259
260/* Constants for NBSTOP */
261#define USART3_NBSTOP_1 0
262#define USART3_NBSTOP_1_5 1
263#define USART3_NBSTOP_2 2
264
265/* Constants for CHMODE */
266#define USART3_CHMODE_NORMAL 0
267#define USART3_CHMODE_ECHO 1
268#define USART3_CHMODE_LOCAL_LOOP 2
269#define USART3_CHMODE_REMOTE_LOOP 3
270
271/* Constants for MSBF */
272#define USART3_MSBF_LSBF 0
273#define USART3_MSBF_MSBF 1
274
275/* Constants for OVER */
276#define USART3_OVER_X16 0
277#define USART3_OVER_X8 1
278
279/* Constants for CD */
280#define USART3_CD_DISABLE 0
281#define USART3_CD_BYPASS 1
282
283/* Constants for TO */
284#define USART3_TO_DISABLE 0
285
286/* Constants for TG */
287#define USART3_TG_DISABLE 0
288
289/* Constants for FI_DI_RATIO */
290#define USART3_FI_DI_RATIO_DISABLE 0
291
292/* Bit manipulation macros */
293#define USART3_BIT(name) \
294 (1 << USART3_##name##_OFFSET)
295#define USART3_BF(name,value) \
296 (((value) & ((1 << USART3_##name##_SIZE) - 1)) \
297 << USART3_##name##_OFFSET)
298#define USART3_BFEXT(name,value) \
299 (((value) >> USART3_##name##_OFFSET) \
300 & ((1 << USART3_##name##_SIZE) - 1))
301#define USART3_BFINS(name,value,old) \
302 (((old) & ~(((1 << USART3_##name##_SIZE) - 1) \
303 << USART3_##name##_OFFSET)) \
304 | USART3_BF(name,value))
305
Wolfgang Denkf93ae782006-10-24 14:31:24 +0200306#endif /* __DRIVERS_ATMEL_USART_H__ */