blob: 345a73b088c141c2b204444f800a0902f553cf90 [file] [log] [blame]
Matthias Weisserb2621bc2010-08-09 13:31:50 +02001/*
2 * (C) Copyright 2010
3 * Matthias Weisser <weisserm@arcor.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * mb86r0xgdc.c - Graphic interface for Fujitsu MB86R0x integrated graphic
26 * controller.
27 */
28
29#include <common.h>
30
31#include <malloc.h>
32#include <asm/io.h>
33#include <asm/arch/hardware.h>
34#include <video_fb.h>
35#include "videomodes.h"
36
37/*
38 * 4MB (at the end of system RAM)
39 */
40#define VIDEO_MEM_SIZE 0x400000
41
42#define FB_SYNC_CLK_INV (1<<16) /* pixel clock inverted */
43
44/*
45 * Graphic Device
46 */
47static GraphicDevice mb86r0x;
48
49static void dsp_init(struct mb86r0x_gdc_dsp *dsp, char *modestr,
50 u32 *videomem)
51{
52 struct ctfb_res_modes var_mode;
53 u32 dcm1, dcm2, dcm3;
54 u16 htp, hdp, hdb, hsp, vtr, vsp, vdp;
55 u8 hsw, vsw;
56 u32 l2m, l2em, l2oa0, l2da0, l2oa1, l2da1;
57 u16 l2dx, l2dy, l2wx, l2wy, l2ww, l2wh;
58 unsigned long div;
59 int bpp;
Matthias Weisserb2621bc2010-08-09 13:31:50 +020060
61 bpp = video_get_params(&var_mode, modestr);
62
63 if (bpp == 0) {
64 var_mode.xres = 640;
65 var_mode.yres = 480;
66 var_mode.pixclock = 39721; /* 25MHz */
67 var_mode.left_margin = 48;
68 var_mode.right_margin = 16;
69 var_mode.upper_margin = 33;
70 var_mode.lower_margin = 10;
71 var_mode.hsync_len = 96;
72 var_mode.vsync_len = 2;
73 var_mode.sync = 0;
74 var_mode.vmode = 0;
75 bpp = 15;
76 }
77
78 /* Fill memory with white */
Matthias Weisser8370bef2011-06-29 13:57:25 +020079 memset(videomem, 0xFF, var_mode.xres * var_mode.yres * 2);
Matthias Weisserb2621bc2010-08-09 13:31:50 +020080
81 mb86r0x.winSizeX = var_mode.xres;
82 mb86r0x.winSizeY = var_mode.yres;
83
84 /* LCD base clock is ~ 660MHZ. We do calculations in kHz */
85 div = 660000 / (1000000000L / var_mode.pixclock);
86 if (div > 64)
87 div = 64;
88 if (0 == div)
89 div = 1;
90
91 dcm1 = (div - 1) << 8;
92 dcm2 = 0x00000000;
93 if (var_mode.sync & FB_SYNC_CLK_INV)
94 dcm3 = 0x00000100;
95 else
96 dcm3 = 0x00000000;
97
98 htp = var_mode.left_margin + var_mode.xres +
99 var_mode.hsync_len + var_mode.right_margin;
100 hdp = var_mode.xres;
101 hdb = var_mode.xres;
102 hsp = var_mode.xres + var_mode.right_margin;
103 hsw = var_mode.hsync_len;
104
105 vsw = var_mode.vsync_len;
106 vtr = var_mode.upper_margin + var_mode.yres +
107 var_mode.vsync_len + var_mode.lower_margin;
108 vsp = var_mode.yres + var_mode.lower_margin;
109 vdp = var_mode.yres;
110
111 l2m = ((var_mode.yres - 1) << (0)) |
112 (((var_mode.xres * 2) / 64) << (16)) |
113 ((1) << (31));
114
115 l2em = (1 << 0) | (1 << 1);
116
117 l2oa0 = mb86r0x.frameAdrs;
118 l2da0 = mb86r0x.frameAdrs;
119 l2oa1 = mb86r0x.frameAdrs;
120 l2da1 = mb86r0x.frameAdrs;
121 l2dx = 0;
122 l2dy = 0;
123 l2wx = 0;
124 l2wy = 0;
125 l2ww = var_mode.xres;
126 l2wh = var_mode.yres - 1;
127
128 writel(dcm1, &dsp->dcm1);
129 writel(dcm2, &dsp->dcm2);
130 writel(dcm3, &dsp->dcm3);
131
132 writew(htp, &dsp->htp);
133 writew(hdp, &dsp->hdp);
134 writew(hdb, &dsp->hdb);
135 writew(hsp, &dsp->hsp);
136 writeb(hsw, &dsp->hsw);
137
138 writeb(vsw, &dsp->vsw);
139 writew(vtr, &dsp->vtr);
140 writew(vsp, &dsp->vsp);
141 writew(vdp, &dsp->vdp);
142
143 writel(l2m, &dsp->l2m);
144 writel(l2em, &dsp->l2em);
145 writel(l2oa0, &dsp->l2oa0);
146 writel(l2da0, &dsp->l2da0);
147 writel(l2oa1, &dsp->l2oa1);
148 writel(l2da1, &dsp->l2da1);
149 writew(l2dx, &dsp->l2dx);
150 writew(l2dy, &dsp->l2dy);
151 writew(l2wx, &dsp->l2wx);
152 writew(l2wy, &dsp->l2wy);
153 writew(l2ww, &dsp->l2ww);
154 writew(l2wh, &dsp->l2wh);
155
156 writel(dcm1 | (1 << 18) | (1 << 31), &dsp->dcm1);
157}
158
159void *video_hw_init(void)
160{
161 struct mb86r0x_gdc *gdc = (struct mb86r0x_gdc *) MB86R0x_GDC_BASE;
162 GraphicDevice *pGD = &mb86r0x;
163 char *s;
164 u32 *vid;
165
166 memset(pGD, 0, sizeof(GraphicDevice));
167
168 pGD->gdfIndex = GDF_15BIT_555RGB;
169 pGD->gdfBytesPP = 2;
170 pGD->memSize = VIDEO_MEM_SIZE;
171 pGD->frameAdrs = PHYS_SDRAM + PHYS_SDRAM_SIZE - VIDEO_MEM_SIZE;
172
173 vid = (u32 *)pGD->frameAdrs;
174
175 s = getenv("videomode");
176 if (s != NULL)
177 dsp_init(&gdc->dsp0, s, vid);
178
179 s = getenv("videomode1");
180 if (s != NULL)
181 dsp_init(&gdc->dsp1, s, vid);
182
183 return pGD;
184}