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wdenk153d5112002-08-30 11:07:04 +00001/*
stroese8b1ccd82004-09-16 12:34:51 +00002 * (C) Copyright 2001-2004
wdenk153d5112002-08-30 11:07:04 +00003 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include "ar405.h"
26#include <asm/processor.h>
27#include <command.h>
wdenk153d5112002-08-30 11:07:04 +000028
wdenk8bde7f72003-06-27 21:31:46 +000029/*cmd_boot.c*/
30extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
stroese8b1ccd82004-09-16 12:34:51 +000031extern void lxt971_no_sleep(void);
wdenk153d5112002-08-30 11:07:04 +000032
33/* ------------------------------------------------------------------------- */
34
35#if 0
36#define FPGA_DEBUG
37#endif
38
39/* fpga configuration data - generated by bin2cc */
40const unsigned char fpgadata[] = {
41#include "fpgadata.c"
42};
43
stroese8b1ccd82004-09-16 12:34:51 +000044const unsigned char fpgadata_xl30[] = {
45#include "fpgadata_xl30.c"
46};
47
wdenk153d5112002-08-30 11:07:04 +000048/*
49 * include common fpga code (for esd boards)
50 */
51#include "../common/fpga.c"
52
53
wdenkc837dcb2004-01-20 23:12:12 +000054int board_early_init_f (void)
wdenk153d5112002-08-30 11:07:04 +000055{
56 DECLARE_GLOBAL_DATA_PTR;
57
58 int index, len, i;
59 int status;
60
61#ifdef FPGA_DEBUG
62 /* set up serial port with default baudrate */
63 (void) get_clocks ();
64 gd->baudrate = CONFIG_BAUDRATE;
65 serial_init ();
66 console_init_f ();
67#endif
68
69 /*
70 * Boot onboard FPGA
71 */
stroese8b1ccd82004-09-16 12:34:51 +000072 /* first try 40er image */
73 gd->board_type = 40;
wdenk153d5112002-08-30 11:07:04 +000074 status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
75 if (status != 0) {
stroese8b1ccd82004-09-16 12:34:51 +000076 /* try xl30er image */
77 gd->board_type = 30;
78 status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
79 if (status != 0) {
80 /* booting FPGA failed */
wdenk153d5112002-08-30 11:07:04 +000081#ifndef FPGA_DEBUG
stroese8b1ccd82004-09-16 12:34:51 +000082 /* set up serial port with default baudrate */
83 (void) get_clocks ();
84 gd->baudrate = CONFIG_BAUDRATE;
85 serial_init ();
86 console_init_f ();
wdenk153d5112002-08-30 11:07:04 +000087#endif
stroese8b1ccd82004-09-16 12:34:51 +000088 printf ("\nFPGA: Booting failed ");
89 switch (status) {
90 case ERROR_FPGA_PRG_INIT_LOW:
91 printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
92 break;
93 case ERROR_FPGA_PRG_INIT_HIGH:
94 printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
95 break;
96 case ERROR_FPGA_PRG_DONE:
97 printf ("(Timeout: DONE not high after programming FPGA)\n ");
98 break;
99 }
wdenk153d5112002-08-30 11:07:04 +0000100
stroese8b1ccd82004-09-16 12:34:51 +0000101 /* display infos on fpgaimage */
102 index = 15;
103 for (i = 0; i < 4; i++) {
104 len = fpgadata[index];
105 printf ("FPGA: %s\n", &(fpgadata[index + 1]));
106 index += len + 3;
107 }
108 putc ('\n');
109 /* delayed reboot */
110 for (i = 20; i > 0; i--) {
111 printf ("Rebooting in %2d seconds \r", i);
112 for (index = 0; index < 1000; index++)
113 udelay (1000);
114 }
115 putc ('\n');
116 do_reset (NULL, 0, 0, NULL);
wdenk153d5112002-08-30 11:07:04 +0000117 }
wdenk153d5112002-08-30 11:07:04 +0000118 }
119
120 /*
121 * IRQ 0-15 405GP internally generated; active high; level sensitive
122 * IRQ 16 405GP internally generated; active low; level sensitive
123 * IRQ 17-24 RESERVED
124 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
125 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
126 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
127 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
128 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
129 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
130 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
131 */
132 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
133 mtdcr (uicer, 0x00000000); /* disable all ints */
134 mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
135 mtdcr (uicpr, 0xFFFFFF81); /* set int polarities */
136 mtdcr (uictr, 0x10000000); /* set int trigger levels */
137 mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
138 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
139
140 *(ushort *) 0xf03000ec = 0x0fff; /* enable all interrupts in fpga */
141
142 return 0;
143}
144
145
146/* ------------------------------------------------------------------------- */
147
148/*
149 * Check Board Identity:
150 */
151
152int checkboard (void)
153{
stroese8b1ccd82004-09-16 12:34:51 +0000154 DECLARE_GLOBAL_DATA_PTR;
155
wdenk153d5112002-08-30 11:07:04 +0000156 int index;
157 int len;
158 unsigned char str[64];
159 int i = getenv_r ("serial#", str, sizeof (str));
stroese8b1ccd82004-09-16 12:34:51 +0000160 const unsigned char *fpga;
wdenk153d5112002-08-30 11:07:04 +0000161
162 puts ("Board: ");
163
stroese8b1ccd82004-09-16 12:34:51 +0000164 if (i == -1) {
165 puts ("### No HW ID - assuming AR405");
166 } else {
167 puts(str);
wdenk153d5112002-08-30 11:07:04 +0000168 }
169
wdenk153d5112002-08-30 11:07:04 +0000170 puts ("\nFPGA: ");
171
172 /* display infos on fpgaimage */
stroese8b1ccd82004-09-16 12:34:51 +0000173 if (gd->board_type == 30) {
174 fpga = fpgadata_xl30;
175 } else {
176 fpga = fpgadata;
177 }
wdenk153d5112002-08-30 11:07:04 +0000178 index = 15;
179 for (i = 0; i < 4; i++) {
stroese8b1ccd82004-09-16 12:34:51 +0000180 len = fpga[index];
181 printf ("%s ", &(fpga[index + 1]));
wdenk153d5112002-08-30 11:07:04 +0000182 index += len + 3;
183 }
184
185 putc ('\n');
186
stroese8b1ccd82004-09-16 12:34:51 +0000187 /*
188 * Disable sleep mode in LXT971
189 */
190 lxt971_no_sleep();
191
wdenk153d5112002-08-30 11:07:04 +0000192 return 0;
193}
194
195/* ------------------------------------------------------------------------- */
196
197long int initdram (int board_type)
198{
199 return (16 * 1024 * 1024);
200}
201
202/* ------------------------------------------------------------------------- */
203
204int testdram (void)
205{
206 /* TODO: XXX XXX XXX */
207 printf ("test: 16 MB - ok\n");
208
209 return (0);
210}
211
212/* ------------------------------------------------------------------------- */