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Graeme Russ9933d602008-12-07 10:29:01 +11001/*
Graeme Russabf0cd32009-02-24 21:13:40 +11002 * (C) Copyright 2009
Graeme Russ9933d602008-12-07 10:29:01 +11003 * Graeme Russ, graeme.russ@gmail.com
4 *
Graeme Russabf0cd32009-02-24 21:13:40 +11005 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02006 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
Graeme Russabf0cd32009-02-24 21:13:40 +11007 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Graeme Russ9933d602008-12-07 10:29:01 +11009 */
10
11#ifndef __ASM_INTERRUPT_H_
12#define __ASM_INTERRUPT_H_ 1
13
Graeme Russ7228efa2010-10-07 20:03:23 +110014#include <asm/types.h>
15
Graeme Russfea25722011-04-13 19:43:28 +100016/* arch/x86/cpu/interrupts.c */
Graeme Russabf0cd32009-02-24 21:13:40 +110017void set_vector(u8 intnum, void *routine);
18
Mike Williams16263082011-07-22 04:01:30 +000019/* arch/x86/lib/interrupts.c */
Graeme Russabf0cd32009-02-24 21:13:40 +110020void disable_irq(int irq);
21void enable_irq(int irq);
22
23/* Architecture specific functions */
24void mask_irq(int irq);
25void unmask_irq(int irq);
26void specific_eoi(int irq);
27
28extern char exception_stack[];
29
Simon Glassa0bd8512014-11-14 18:18:31 -070030/**
31 * configure_irq_trigger() - Configure IRQ triggering
32 *
33 * Switch the given interrupt to be level / edge triggered
34 *
35 * @param int_num legacy interrupt number (3-7, 9-15)
36 * @param is_level_triggered true for level triggered interrupt, false for
37 * edge triggered interrupt
38 */
39void configure_irq_trigger(int int_num, bool is_level_triggered);
40
Simon Glass6f41e0e7b2015-04-28 20:25:16 -060041void *x86_get_idt(void);
42
Graeme Russ9933d602008-12-07 10:29:01 +110043#endif