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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Dinh Nguyen77754402012-10-04 06:46:02 +00002/*
Pavel Machek5095ee02014-09-08 14:08:45 +02003 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
Dinh Nguyen77754402012-10-04 06:46:02 +00004 */
Pavel Machek5095ee02014-09-08 14:08:45 +02005#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
6#define __CONFIG_SOCFPGA_CYCLONE5_H__
Dinh Nguyen77754402012-10-04 06:46:02 +00007
Dinh Nguyen871c24b2015-11-23 17:27:17 -06008#include <asm/arch/base_addr_ac5.h>
Dinh Nguyen77754402012-10-04 06:46:02 +00009
Pavel Machek5095ee02014-09-08 14:08:45 +020010/* Memory configurations */
Marek Vasut47f9b4e2014-09-08 14:08:45 +020011#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
Dinh Nguyen77754402012-10-04 06:46:02 +000012
Pavel Machek5095ee02014-09-08 14:08:45 +020013/* The rest of the configuration is shared */
14#include <configs/socfpga_common.h>
Dinh Nguyen77754402012-10-04 06:46:02 +000015
Pavel Machek5095ee02014-09-08 14:08:45 +020016#endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */