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Stefano Babiceae49882011-01-20 08:05:15 +00001/*
2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3 *
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5 *
6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7 *
8 * Configuration for the MX35pdk Freescale board.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Stefano Babiceae49882011-01-20 08:05:15 +000011 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16#include <asm/arch/imx-regs.h>
17
18 /* High Level Configuration Options */
Stefano Babiceae49882011-01-20 08:05:15 +000019#define CONFIG_MX35
Stefano Babiceae49882011-01-20 08:05:15 +000020
21#define CONFIG_DISPLAY_CPUINFO
Gong Qianyu18fb0e32015-10-26 19:47:42 +080022#define CONFIG_SYS_FSL_CLK
Stefano Babiceae49882011-01-20 08:05:15 +000023
24/* Set TEXT at the beginning of the NOR flash */
25#define CONFIG_SYS_TEXT_BASE 0xA0000000
26
Stefano Babiceae49882011-01-20 08:05:15 +000027#define CONFIG_BOARD_EARLY_INIT_F
Helmut Raiger9660e442011-10-20 04:19:47 +000028#define CONFIG_BOARD_LATE_INIT
Stefano Babiceae49882011-01-20 08:05:15 +000029
30#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
31#define CONFIG_REVISION_TAG
32#define CONFIG_SETUP_MEMORY_TAGS
33#define CONFIG_INITRD_TAG
34
35/*
36 * Size of malloc() pool
37 */
38#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
39
40/*
41 * Hardware drivers
42 */
tremb089d032013-09-21 18:13:36 +020043#define CONFIG_SYS_I2C
44#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020045#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
46#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070047#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Stefano Babiceae49882011-01-20 08:05:15 +000048#define CONFIG_MXC_SPI
Stefano Babica4adedd2011-08-21 11:00:32 +020049#define CONFIG_MXC_GPIO
Stefano Babiceae49882011-01-20 08:05:15 +000050
51
52/*
53 * PMIC Configs
54 */
Łukasz Majewskibe3b51a2012-11-13 03:22:14 +000055#define CONFIG_POWER
56#define CONFIG_POWER_I2C
57#define CONFIG_POWER_FSL
Simon Glass913702c2014-05-20 06:01:34 -060058#define CONFIG_POWER_FSL_MC13892
Stefano Babiceae49882011-01-20 08:05:15 +000059#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
Fabio Estevamd28d6a92011-10-25 01:35:37 +000060#define CONFIG_RTC_MC13XXX
Stefano Babiceae49882011-01-20 08:05:15 +000061
62/*
63 * MFD MC9SDZ60
64 */
65#define CONFIG_FSL_MC9SDZ60
66#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
67
68/*
69 * UART (console)
70 */
71#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010072#define CONFIG_MXC_UART_BASE UART1_BASE
Stefano Babiceae49882011-01-20 08:05:15 +000073
74/* allow to overwrite serial and ethaddr */
75#define CONFIG_ENV_OVERWRITE
76#define CONFIG_CONS_INDEX 1
77#define CONFIG_BAUDRATE 115200
Stefano Babiceae49882011-01-20 08:05:15 +000078
79/*
80 * Command definition
81 */
Fabio Estevamee303c92012-10-24 09:44:29 +000082#define CONFIG_CMD_BOOTZ
Stefano Babiceae49882011-01-20 08:05:15 +000083#define CONFIG_CMD_PING
84#define CONFIG_CMD_DHCP
85#define CONFIG_BOOTP_SUBNETMASK
86#define CONFIG_BOOTP_GATEWAY
87#define CONFIG_BOOTP_DNS
88
89#define CONFIG_CMD_NAND
Stefano Babic0792a362012-04-01 03:23:01 +000090#define CONFIG_CMD_CACHE
Stefano Babiceae49882011-01-20 08:05:15 +000091
92#define CONFIG_CMD_I2C
93#define CONFIG_CMD_SPI
94#define CONFIG_CMD_MII
Stefano Babiceae49882011-01-20 08:05:15 +000095#define CONFIG_NET_RETRY_COUNT 100
Fabio Estevamd28d6a92011-10-25 01:35:37 +000096#define CONFIG_CMD_DATE
Stefano Babiceae49882011-01-20 08:05:15 +000097
Benoît Thébaudeau961a7622012-11-13 09:58:25 +000098#define CONFIG_CMD_USB
99#define CONFIG_USB_STORAGE
Stefano Babic32925392012-09-05 21:47:42 +0000100#define CONFIG_CMD_MMC
101#define CONFIG_DOS_PARTITION
102#define CONFIG_EFI_PARTITION
103#define CONFIG_CMD_EXT2
104#define CONFIG_CMD_FAT
105
Fabio Estevamec7503b2012-11-16 05:09:10 +0000106#define CONFIG_BOOTDELAY 1
Stefano Babiceae49882011-01-20 08:05:15 +0000107
108#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
109
110/*
111 * Ethernet on the debug board (SMC911)
112 */
113#define CONFIG_SMC911X
114#define CONFIG_SMC911X_16_BIT 1
115#define CONFIG_SMC911X_BASE CS5_BASE_ADDR
116
117#define CONFIG_HAS_ETH1
Stefano Babiceae49882011-01-20 08:05:15 +0000118#define CONFIG_ETHPRIME
119
120/*
121 * Ethernet on SOC (FEC)
122 */
123#define CONFIG_FEC_MXC
124#define IMX_FEC_BASE FEC_BASE_ADDR
125#define CONFIG_FEC_MXC_PHYADDR 0x1F
126
127#define CONFIG_MII
Stefano Babiceae49882011-01-20 08:05:15 +0000128
129#define CONFIG_ARP_TIMEOUT 200UL
130
131/*
132 * Miscellaneous configurable options
133 */
134#define CONFIG_SYS_LONGHELP /* undef to save memory */
Stefano Babiceae49882011-01-20 08:05:15 +0000135#define CONFIG_CMDLINE_EDITING
136#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
Stefano Babiceae49882011-01-20 08:05:15 +0000137
138#define CONFIG_AUTO_COMPLETE
139#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Stefano Babiceae49882011-01-20 08:05:15 +0000140#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
141#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
142
143#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
144#define CONFIG_SYS_MEMTEST_END 0x10000
145
Stefano Babiceae49882011-01-20 08:05:15 +0000146#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
147
Stefano Babiceae49882011-01-20 08:05:15 +0000148/*
149 * Physical Memory Map
150 */
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200151#define CONFIG_NR_DRAM_BANKS 2
Stefano Babiceae49882011-01-20 08:05:15 +0000152#define PHYS_SDRAM_1 CSD0_BASE_ADDR
153#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200154#define PHYS_SDRAM_2 CSD1_BASE_ADDR
155#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
Stefano Babiceae49882011-01-20 08:05:15 +0000156
157#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
158#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
159#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
160#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
161 GENERATED_GBL_DATA_SIZE)
162#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
163 CONFIG_SYS_GBL_DATA_OFFSET)
164
165/*
166 * MTD Command for mtdparts
167 */
168#define CONFIG_CMD_MTDPARTS
169#define CONFIG_MTD_DEVICE
170#define CONFIG_FLASH_CFI_MTD
171#define CONFIG_MTD_PARTITIONS
172#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
173#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \
174 "96m(root),8m(cfg),1938m(user);" \
175 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
176
177/*
178 * FLASH and environment organization
179 */
180#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
181#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
182#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
183/* Monitor at beginning of flash */
184#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
185#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
186
187#define CONFIG_ENV_SECT_SIZE (128 * 1024)
188#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
189
190/* Address and size of Redundant Environment Sector */
191#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
192#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
193
194#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
195 CONFIG_SYS_MONITOR_LEN)
196
197#define CONFIG_ENV_IS_IN_FLASH
198
199#if defined(CONFIG_FSL_ENV_IN_NAND)
200 #define CONFIG_ENV_IS_IN_NAND
201 #define CONFIG_ENV_OFFSET (1024 * 1024)
202#endif
203
204/*
205 * CFI FLASH driver setup
206 */
207#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
208#define CONFIG_FLASH_CFI_DRIVER
209
210/* A non-standard buffered write algorithm */
211#define CONFIG_FLASH_SPANSION_S29WS_N
212#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
213#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
214
215/*
216 * NAND FLASH driver setup
217 */
218#define CONFIG_NAND_MXC
Stefano Babiceae49882011-01-20 08:05:15 +0000219#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
220#define CONFIG_SYS_MAX_NAND_DEVICE 1
221#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
222#define CONFIG_MXC_NAND_HWECC
223#define CONFIG_SYS_NAND_LARGEPAGE
224
Benoît Thébaudeau961a7622012-11-13 09:58:25 +0000225/* EHCI driver */
226#define CONFIG_USB_EHCI
227#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
228#define CONFIG_EHCI_IS_TDI
229#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
230#define CONFIG_USB_EHCI_MXC
231#define CONFIG_MXC_USB_PORT 0
232#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \
233 MXC_EHCI_POWER_PINS_ENABLED | \
234 MXC_EHCI_OC_PIN_ACTIVE_LOW)
235#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
236
Stefano Babic32925392012-09-05 21:47:42 +0000237/* mmc driver */
238#define CONFIG_MMC
239#define CONFIG_GENERIC_MMC
240#define CONFIG_FSL_ESDHC
241#define CONFIG_SYS_FSL_ESDHC_ADDR 0
242#define CONFIG_SYS_FSL_ESDHC_NUM 1
243
Stefano Babiceae49882011-01-20 08:05:15 +0000244/*
245 * Default environment and default scripts
246 * to update uboot and load kernel
247 */
Stefano Babiceae49882011-01-20 08:05:15 +0000248
249#define CONFIG_HOSTNAME "mx35pdk"
250#define CONFIG_EXTRA_ENV_SETTINGS \
251 "netdev=eth1\0" \
252 "ethprime=smc911x\0" \
253 "nfsargs=setenv bootargs root=/dev/nfs rw " \
254 "nfsroot=${serverip}:${rootpath}\0" \
255 "ramargs=setenv bootargs root=/dev/ram rw\0" \
256 "addip_sta=setenv bootargs ${bootargs} " \
257 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
258 ":${hostname}:${netdev}:off panic=1\0" \
259 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
260 "addip=if test -n ${ipdyn};then run addip_dyn;" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200261 "else run addip_sta;fi\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000262 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
263 "addtty=setenv bootargs ${bootargs}" \
264 " console=ttymxc0,${baudrate}\0" \
265 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
266 "loadaddr=80800000\0" \
267 "kernel_addr_r=80800000\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200268 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
269 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
270 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000271 "flash_self=run ramargs addip addtty addmtd addmisc;" \
272 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
273 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
274 "bootm ${kernel_addr}\0" \
275 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
276 "run nfsargs addip addtty addmtd addmisc;" \
277 "bootm ${kernel_addr_r}\0" \
278 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
279 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200280 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000281 "load=tftp ${loadaddr} ${u-boot}\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200282 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
Stefano Babic32925392012-09-05 21:47:42 +0000283 "update=protect off ${uboot_addr} +80000;" \
284 "erase ${uboot_addr} +80000;" \
Stefano Babiceae49882011-01-20 08:05:15 +0000285 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
286 "upd=if run load;then echo Updating u-boot;if run update;" \
287 "then echo U-Boot updated;" \
288 "else echo Error updating u-boot !;" \
289 "echo Board without bootloader !!;" \
290 "fi;" \
291 "else echo U-Boot not downloaded..exiting;fi\0" \
292 "bootcmd=run net_nfs\0"
293
294#endif /* __CONFIG_H */