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wdenk8ed96042005-01-09 23:16:25 +00001/*
2 * armboot - Startup Code for OMP2420/ARM1136 CPU-core
3 *
wdenk082acfd2005-01-10 00:01:04 +00004 * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
wdenk8ed96042005-01-09 23:16:25 +00005 *
6 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
7 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
Detlev Zundel792a09e2009-05-13 10:54:10 +02008 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
wdenk8ed96042005-01-09 23:16:25 +00009 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
10 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenk082acfd2005-01-10 00:01:04 +000022 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk8ed96042005-01-09 23:16:25 +000023 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <config.h>
32#include <version.h>
wdenk8ed96042005-01-09 23:16:25 +000033.globl _start
wdenk082acfd2005-01-10 00:01:04 +000034_start: b reset
Magnus Liljadf812382009-06-13 20:50:00 +020035#ifdef CONFIG_PRELOADER
Kyungmin Park751b9b52008-01-17 16:43:25 +090036 ldr pc, _hang
37 ldr pc, _hang
38 ldr pc, _hang
39 ldr pc, _hang
40 ldr pc, _hang
41 ldr pc, _hang
42 ldr pc, _hang
43
44_hang:
45 .word do_hang
46 .word 0x12345678
47 .word 0x12345678
48 .word 0x12345678
49 .word 0x12345678
50 .word 0x12345678
51 .word 0x12345678
52 .word 0x12345678 /* now 16*4=64 */
53#else
wdenk8ed96042005-01-09 23:16:25 +000054 ldr pc, _undefined_instruction
55 ldr pc, _software_interrupt
56 ldr pc, _prefetch_abort
57 ldr pc, _data_abort
58 ldr pc, _not_used
59 ldr pc, _irq
60 ldr pc, _fiq
61
wdenk082acfd2005-01-10 00:01:04 +000062_undefined_instruction: .word undefined_instruction
wdenk8ed96042005-01-09 23:16:25 +000063_software_interrupt: .word software_interrupt
64_prefetch_abort: .word prefetch_abort
65_data_abort: .word data_abort
66_not_used: .word not_used
67_irq: .word irq
68_fiq: .word fiq
wdenk082acfd2005-01-10 00:01:04 +000069_pad: .word 0x12345678 /* now 16*4=64 */
Magnus Liljadf812382009-06-13 20:50:00 +020070#endif /* CONFIG_PRELOADER */
wdenk8ed96042005-01-09 23:16:25 +000071.global _end_vect
72_end_vect:
73
74 .balignl 16,0xdeadbeef
75/*
76 *************************************************************************
77 *
78 * Startup Code (reset vector)
79 *
80 * do important init only if we don't start from memory!
81 * setup Memory and board specific bits prior to relocation.
82 * relocate armboot to ram
83 * setup stack
84 *
85 *************************************************************************
86 */
87
Heiko Schochere48b7c02010-09-17 13:10:40 +020088.globl _TEXT_BASE
wdenk8ed96042005-01-09 23:16:25 +000089_TEXT_BASE:
Wolfgang Denk14d0a022010-10-07 21:51:12 +020090 .word CONFIG_SYS_TEXT_BASE
wdenk8ed96042005-01-09 23:16:25 +000091
wdenk8ed96042005-01-09 23:16:25 +000092/*
93 * These are defined in the board-specific linker script.
Heiko Schocherbafe7432010-10-13 07:57:14 +020094 * Subtracting _start from them lets the linker put their
95 * relative position in the executable instead of leaving
96 * them null.
wdenk8ed96042005-01-09 23:16:25 +000097 */
Heiko Schocherbafe7432010-10-13 07:57:14 +020098.globl _bss_start_ofs
99_bss_start_ofs:
100 .word __bss_start - _start
wdenk8ed96042005-01-09 23:16:25 +0000101
Heiko Schocherbafe7432010-10-13 07:57:14 +0200102.globl _bss_end_ofs
103_bss_end_ofs:
104 .word _end - _start
wdenk8ed96042005-01-09 23:16:25 +0000105
Heiko Schocherbafe7432010-10-13 07:57:14 +0200106.globl _datarel_start_ofs
107_datarel_start_ofs:
108 .word __datarel_start - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200109
Heiko Schocherbafe7432010-10-13 07:57:14 +0200110.globl _datarelrolocal_start_ofs
111_datarelrolocal_start_ofs:
112 .word __datarelrolocal_start - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200113
Heiko Schocherbafe7432010-10-13 07:57:14 +0200114.globl _datarellocal_start_ofs
115_datarellocal_start_ofs:
116 .word __datarellocal_start - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200117
Heiko Schocherbafe7432010-10-13 07:57:14 +0200118.globl _datarelro_start_ofs
119_datarelro_start_ofs:
120 .word __datarelro_start - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200121
wdenk8ed96042005-01-09 23:16:25 +0000122#ifdef CONFIG_USE_IRQ
123/* IRQ stack memory (calculated at run-time) */
124.globl IRQ_STACK_START
125IRQ_STACK_START:
126 .word 0x0badc0de
127
128/* IRQ stack memory (calculated at run-time) */
129.globl FIQ_STACK_START
130FIQ_STACK_START:
131 .word 0x0badc0de
132#endif
133
Heiko Schochere48b7c02010-09-17 13:10:40 +0200134#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
135/* IRQ stack memory (calculated at run-time) + 8 bytes */
136.globl IRQ_STACK_START_IN
137IRQ_STACK_START_IN:
138 .word 0x0badc0de
139#endif
140
141#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
142/*
143 * the actual reset code
144 */
145
146reset:
147 /*
148 * set the cpu to SVC32 mode
149 */
150 mrs r0,cpsr
151 bic r0,r0,#0x1f
152 orr r0,r0,#0xd3
153 msr cpsr,r0
154
155#ifdef CONFIG_OMAP2420H4
156 /* Copy vectors to mask ROM indirect addr */
157 adr r0, _start /* r0 <- current position of code */
158 add r0, r0, #4 /* skip reset vector */
159 mov r2, #64 /* r2 <- size to copy */
160 add r2, r0, r2 /* r2 <- source end address */
161 mov r1, #SRAM_OFFSET0 /* build vect addr */
162 mov r3, #SRAM_OFFSET1
163 add r1, r1, r3
164 mov r3, #SRAM_OFFSET2
165 add r1, r1, r3
166next:
167 ldmia r0!, {r3-r10} /* copy from source address [r0] */
168 stmia r1!, {r3-r10} /* copy to target address [r1] */
169 cmp r0, r2 /* until source end address [r2] */
170 bne next /* loop until equal */
171 bl cpy_clk_code /* put dpll adjust code behind vectors */
172#endif
173 /* the mask ROM code should have PLL and others stable */
174#ifndef CONFIG_SKIP_LOWLEVEL_INIT
175 bl cpu_init_crit
176#endif
177
178/* Set stackpointer in internal RAM to call board_init_f */
179call_board_init_f:
180 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
181 ldr r0,=0x00000000
182
183#ifdef CONFIG_NAND_SPL
184 bl nand_boot
185#else
186#ifdef CONFIG_ONENAND_IPL
187 bl start_oneboot
188#else
189 bl board_init_f
190#endif /* CONFIG_ONENAND_IPL */
191#endif /* CONFIG_NAND_SPL */
192
193/*------------------------------------------------------------------------------*/
194
195/*
196 * void relocate_code (addr_sp, gd, addr_moni)
197 *
198 * This "function" does not return, instead it continues in RAM
199 * after relocating the monitor code.
200 *
201 */
202 .globl relocate_code
203relocate_code:
204 mov r4, r0 /* save addr_sp */
205 mov r5, r1 /* save addr of gd */
206 mov r6, r2 /* save addr of destination */
207 mov r7, r2 /* save addr of destination */
208
209 /* Set up the stack */
210stack_setup:
211 mov sp, r4
212
213 adr r0, _start
214 ldr r2, _TEXT_BASE
Heiko Schocherbafe7432010-10-13 07:57:14 +0200215 ldr r3, _bss_start_ofs
216 add r2, r0, r3 /* r2 <- source end address */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200217 cmp r0, r6
218 beq clear_bss
219
220#ifndef CONFIG_SKIP_RELOCATE_UBOOT
221copy_loop:
222 ldmia r0!, {r9-r10} /* copy from source address [r0] */
223 stmia r6!, {r9-r10} /* copy to target address [r1] */
Albert Aribaudda90d4c2010-10-05 16:06:39 +0200224 cmp r0, r2 /* until source end address [r2] */
225 blo copy_loop
Heiko Schochere48b7c02010-09-17 13:10:40 +0200226
227#ifndef CONFIG_PRELOADER
Heiko Schocherbafe7432010-10-13 07:57:14 +0200228 /*
229 * fix .rel.dyn relocations
230 */
231 ldr r0, _TEXT_BASE /* r0 <- Text base */
232 sub r9, r7, r0 /* r9 <- relocation offset */
233 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
234 add r10, r10, r0 /* r10 <- sym table in FLASH */
235 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
236 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
237 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
238 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200239fixloop:
Gray Remlin8c0c2b92010-10-24 16:18:31 +0100240 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
241 add r0, r0, r9 /* r0 <- location to fix up in RAM */
Heiko Schocherbafe7432010-10-13 07:57:14 +0200242 ldr r1, [r2, #4]
243 and r8, r1, #0xff
Gray Remlin8c0c2b92010-10-24 16:18:31 +0100244 cmp r8, #23 /* relative fixup? */
Heiko Schocherbafe7432010-10-13 07:57:14 +0200245 beq fixrel
Gray Remlin8c0c2b92010-10-24 16:18:31 +0100246 cmp r8, #2 /* absolute fixup? */
Heiko Schocherbafe7432010-10-13 07:57:14 +0200247 beq fixabs
248 /* ignore unknown type of fixup */
249 b fixnext
250fixabs:
251 /* absolute fix: set location to (offset) symbol value */
252 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
253 add r1, r10, r1 /* r1 <- address of symbol in table */
254 ldr r1, [r1, #4] /* r1 <- symbol value */
255 add r1, r9 /* r1 <- relocated sym addr */
256 b fixnext
257fixrel:
258 /* relative fix: increase location by offset */
259 ldr r1, [r0]
260 add r1, r1, r9
261fixnext:
262 str r1, [r0]
Gray Remlin8c0c2b92010-10-24 16:18:31 +0100263 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200264 cmp r2, r3
Heiko Schocherbafe7432010-10-13 07:57:14 +0200265 ble fixloop
Heiko Schochere48b7c02010-09-17 13:10:40 +0200266#endif
267#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
268
269clear_bss:
270#ifndef CONFIG_PRELOADER
Heiko Schocherbafe7432010-10-13 07:57:14 +0200271 ldr r0, _bss_start_ofs
272 ldr r1, _bss_end_ofs
Heiko Schochere48b7c02010-09-17 13:10:40 +0200273 ldr r3, _TEXT_BASE /* Text base */
274 mov r4, r7 /* reloc addr */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200275 add r0, r0, r4
Heiko Schochere48b7c02010-09-17 13:10:40 +0200276 add r1, r1, r4
277 mov r2, #0x00000000 /* clear */
278
279clbss_l:str r2, [r0] /* clear loop... */
280 add r0, r0, #4
281 cmp r0, r1
282 bne clbss_l
283#endif /* #ifndef CONFIG_PRELOADER */
284
285/*
286 * We are done. Do not return, instead branch to second part of board
287 * initialization, now running from RAM.
288 */
289#ifdef CONFIG_NAND_SPL
Heiko Schocherbafe7432010-10-13 07:57:14 +0200290 ldr r0, _nand_boot_ofs
291 adr r1, _start
292 add pc, r0, r1
293_nand_boot_ofs
294 : .word nand_boot - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200295#else
296jump_2_ram:
Heiko Schocherbafe7432010-10-13 07:57:14 +0200297 ldr r0, _board_init_r_ofs
298 adr r1, _start
299 add r0, r0, r1
300 add lr, r0, r9
Heiko Schochere48b7c02010-09-17 13:10:40 +0200301 /* setup parameters for board_init_r */
302 mov r0, r5 /* gd_t */
303 mov r1, r7 /* dest_addr */
304 /* jump to it ... */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200305 mov pc, lr
306
Heiko Schocherbafe7432010-10-13 07:57:14 +0200307_board_init_r_ofs:
308 .word board_init_r - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200309#endif
Heiko Schocherbafe7432010-10-13 07:57:14 +0200310
311_rel_dyn_start_ofs:
312 .word __rel_dyn_start - _start
313_rel_dyn_end_ofs:
314 .word __rel_dyn_end - _start
315_dynsym_start_ofs:
316 .word __dynsym_start - _start
317
Heiko Schochere48b7c02010-09-17 13:10:40 +0200318#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
wdenk8ed96042005-01-09 23:16:25 +0000319/*
320 * the actual reset code
321 */
322
323reset:
324 /*
325 * set the cpu to SVC32 mode
326 */
327 mrs r0,cpsr
328 bic r0,r0,#0x1f
329 orr r0,r0,#0xd3
330 msr cpsr,r0
331
332#ifdef CONFIG_OMAP2420H4
wdenk082acfd2005-01-10 00:01:04 +0000333 /* Copy vectors to mask ROM indirect addr */
334 adr r0, _start /* r0 <- current position of code */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200335 add r0, r0, #4 /* skip reset vector */
wdenk082acfd2005-01-10 00:01:04 +0000336 mov r2, #64 /* r2 <- size to copy */
337 add r2, r0, r2 /* r2 <- source end address */
338 mov r1, #SRAM_OFFSET0 /* build vect addr */
339 mov r3, #SRAM_OFFSET1
340 add r1, r1, r3
341 mov r3, #SRAM_OFFSET2
342 add r1, r1, r3
wdenk8ed96042005-01-09 23:16:25 +0000343next:
wdenk082acfd2005-01-10 00:01:04 +0000344 ldmia r0!, {r3-r10} /* copy from source address [r0] */
345 stmia r1!, {r3-r10} /* copy to target address [r1] */
346 cmp r0, r2 /* until source end address [r2] */
347 bne next /* loop until equal */
wdenk082acfd2005-01-10 00:01:04 +0000348 bl cpy_clk_code /* put dpll adjust code behind vectors */
wdenk8ed96042005-01-09 23:16:25 +0000349#endif
wdenk8ed96042005-01-09 23:16:25 +0000350 /* the mask ROM code should have PLL and others stable */
wdenk8aa1a2d2005-04-04 12:44:11 +0000351#ifndef CONFIG_SKIP_LOWLEVEL_INIT
wdenk8ed96042005-01-09 23:16:25 +0000352 bl cpu_init_crit
wdenk8aa1a2d2005-04-04 12:44:11 +0000353#endif
wdenk8ed96042005-01-09 23:16:25 +0000354
wdenk8aa1a2d2005-04-04 12:44:11 +0000355#ifndef CONFIG_SKIP_RELOCATE_UBOOT
wdenk8ed96042005-01-09 23:16:25 +0000356relocate: /* relocate U-Boot to RAM */
357 adr r0, _start /* r0 <- current position of code */
358 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
wdenk082acfd2005-01-10 00:01:04 +0000359 cmp r0, r1 /* don't reloc during debug */
Magnus Liljadf812382009-06-13 20:50:00 +0200360#ifndef CONFIG_PRELOADER
wdenk082acfd2005-01-10 00:01:04 +0000361 beq stack_setup
Magnus Liljadf812382009-06-13 20:50:00 +0200362#endif /* CONFIG_PRELOADER */
wdenk8ed96042005-01-09 23:16:25 +0000363
364 ldr r2, _armboot_start
365 ldr r3, _bss_start
wdenk082acfd2005-01-10 00:01:04 +0000366 sub r2, r3, r2 /* r2 <- size of armboot */
367 add r2, r0, r2 /* r2 <- source end address */
wdenk8ed96042005-01-09 23:16:25 +0000368
369copy_loop:
370 ldmia r0!, {r3-r10} /* copy from source address [r0] */
371 stmia r1!, {r3-r10} /* copy to target address [r1] */
Albert Aribaudda90d4c2010-10-05 16:06:39 +0200372 cmp r0, r2 /* until source end address [r2] */
373 blo copy_loop
wdenk8aa1a2d2005-04-04 12:44:11 +0000374#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
wdenk8ed96042005-01-09 23:16:25 +0000375
376 /* Set up the stack */
377stack_setup:
378 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
Magnus Liljadf812382009-06-13 20:50:00 +0200379#ifdef CONFIG_PRELOADER
Kyungmin Park751b9b52008-01-17 16:43:25 +0900380 sub sp, r0, #128 /* leave 32 words for abort-stack */
381#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200382 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
383 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
wdenk8ed96042005-01-09 23:16:25 +0000384#ifdef CONFIG_USE_IRQ
385 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
386#endif
387 sub sp, r0, #12 /* leave 3 words for abort-stack */
Magnus Liljadf812382009-06-13 20:50:00 +0200388#endif /* CONFIG_PRELOADER */
Vitaly Kuzmichev1a27f7d2010-06-15 22:18:11 +0400389 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
wdenk8ed96042005-01-09 23:16:25 +0000390
391clear_bss:
Heiko Schocherbafe7432010-10-13 07:57:14 +0200392 adr r2, _start
393 ldr r0, _bss_start_ofs /* find start of bss segment */
394 add r0, r0, r2
395 ldr r1, _bss_end_ofs /* stop here */
396 add r1, r1, r2
wdenk082acfd2005-01-10 00:01:04 +0000397 mov r2, #0x00000000 /* clear */
wdenk8ed96042005-01-09 23:16:25 +0000398
Magnus Liljadf812382009-06-13 20:50:00 +0200399#ifndef CONFIG_PRELOADER
wdenk082acfd2005-01-10 00:01:04 +0000400clbss_l:str r2, [r0] /* clear loop... */
wdenk8ed96042005-01-09 23:16:25 +0000401 add r0, r0, #4
402 cmp r0, r1
403 bne clbss_l
Kyungmin Park751b9b52008-01-17 16:43:25 +0900404#endif
wdenk8ed96042005-01-09 23:16:25 +0000405
Heiko Schocherbafe7432010-10-13 07:57:14 +0200406 ldr r0, _start_armboot_ofs
407 adr r1, _start
408 add r0, r0, r1
409 ldr pc, r0
wdenk8ed96042005-01-09 23:16:25 +0000410
Heiko Schocherbafe7432010-10-13 07:57:14 +0200411_start_armboot_ofs:
Magnus Lilja40c642b2009-06-13 20:50:01 +0200412#ifdef CONFIG_NAND_SPL
Heiko Schocherbafe7432010-10-13 07:57:14 +0200413 .word nand_boot - _start
Magnus Lilja40c642b2009-06-13 20:50:01 +0200414#else
Kyungmin Park751b9b52008-01-17 16:43:25 +0900415#ifdef CONFIG_ONENAND_IPL
Heiko Schocherbafe7432010-10-13 07:57:14 +0200416 .word start_oneboot - _start
Kyungmin Park751b9b52008-01-17 16:43:25 +0900417#else
Heiko Schocherbafe7432010-10-13 07:57:14 +0200418 .word start_armboot - _start
Magnus Lilja40c642b2009-06-13 20:50:01 +0200419#endif /* CONFIG_ONENAND_IPL */
420#endif /* CONFIG_NAND_SPL */
wdenk8ed96042005-01-09 23:16:25 +0000421
Heiko Schochere48b7c02010-09-17 13:10:40 +0200422#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
423
wdenk8ed96042005-01-09 23:16:25 +0000424/*
425 *************************************************************************
426 *
427 * CPU_init_critical registers
428 *
429 * setup important registers
430 * setup memory timing
431 *
432 *************************************************************************
433 */
Magnus Lilja40c642b2009-06-13 20:50:01 +0200434#ifndef CONFIG_SKIP_LOWLEVEL_INIT
wdenk8ed96042005-01-09 23:16:25 +0000435cpu_init_crit:
436 /*
437 * flush v4 I/D caches
438 */
439 mov r0, #0
George G. Davis409a07c2010-05-11 10:15:36 -0400440 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
441 mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
wdenk8ed96042005-01-09 23:16:25 +0000442
443 /*
444 * disable MMU stuff and caches
445 */
446 mrc p15, 0, r0, c1, c0, 0
447 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
448 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
449 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
wdenk8ed96042005-01-09 23:16:25 +0000450 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
wdenk8ed96042005-01-09 23:16:25 +0000451 mcr p15, 0, r0, c1, c0, 0
452
453 /*
wdenk082acfd2005-01-10 00:01:04 +0000454 * Jump to board specific initialization... The Mask ROM will have already initialized
455 * basic memory. Go here to bump up clock rate and handle wake up conditions.
wdenk8ed96042005-01-09 23:16:25 +0000456 */
wdenk082acfd2005-01-10 00:01:04 +0000457 mov ip, lr /* persevere link reg across call */
Wolfgang Denk87cb6862005-10-06 17:08:18 +0200458 bl lowlevel_init /* go setup pll,mux,memory */
wdenk082acfd2005-01-10 00:01:04 +0000459 mov lr, ip /* restore link */
460 mov pc, lr /* back to my caller */
Magnus Lilja40c642b2009-06-13 20:50:01 +0200461#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
Kyungmin Park751b9b52008-01-17 16:43:25 +0900462
Magnus Liljadf812382009-06-13 20:50:00 +0200463#ifndef CONFIG_PRELOADER
wdenk8ed96042005-01-09 23:16:25 +0000464/*
465 *************************************************************************
466 *
467 * Interrupt handling
468 *
469 *************************************************************************
470 */
471@
472@ IRQ stack frame.
473@
474#define S_FRAME_SIZE 72
475
476#define S_OLD_R0 68
477#define S_PSR 64
478#define S_PC 60
479#define S_LR 56
480#define S_SP 52
481
482#define S_IP 48
483#define S_FP 44
484#define S_R10 40
485#define S_R9 36
486#define S_R8 32
487#define S_R7 28
488#define S_R6 24
489#define S_R5 20
490#define S_R4 16
491#define S_R3 12
492#define S_R2 8
493#define S_R1 4
494#define S_R0 0
495
496#define MODE_SVC 0x13
497#define I_BIT 0x80
498
499/*
500 * use bad_save_user_regs for abort/prefetch/undef/swi ...
501 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
502 */
503
504 .macro bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000505 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
wdenk8ed96042005-01-09 23:16:25 +0000506 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
507
Heiko Schochere48b7c02010-09-17 13:10:40 +0200508#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
509 ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
510#else
Heiko Schocherbafe7432010-10-13 07:57:14 +0200511 adr r2, _start
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200512 sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
513 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
Heiko Schochere48b7c02010-09-17 13:10:40 +0200514#endif
wdenk082acfd2005-01-10 00:01:04 +0000515 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
wdenk8ed96042005-01-09 23:16:25 +0000516 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
517
518 add r5, sp, #S_SP
519 mov r1, lr
wdenk082acfd2005-01-10 00:01:04 +0000520 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
521 mov r0, sp @ save current stack into r0 (param register)
wdenk8ed96042005-01-09 23:16:25 +0000522 .endm
523
524 .macro irq_save_user_regs
525 sub sp, sp, #S_FRAME_SIZE
526 stmia sp, {r0 - r12} @ Calling r0-r12
wdenk082acfd2005-01-10 00:01:04 +0000527 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
528 stmdb r8, {sp, lr}^ @ Calling SP, LR
529 str lr, [r8, #0] @ Save calling PC
530 mrs r6, spsr
531 str r6, [r8, #4] @ Save CPSR
532 str r0, [r8, #8] @ Save OLD_R0
wdenk8ed96042005-01-09 23:16:25 +0000533 mov r0, sp
534 .endm
535
536 .macro irq_restore_user_regs
537 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
538 mov r0, r0
539 ldr lr, [sp, #S_PC] @ Get PC
540 add sp, sp, #S_FRAME_SIZE
541 subs pc, lr, #4 @ return & move spsr_svc into cpsr
542 .endm
543
544 .macro get_bad_stack
Heiko Schochere48b7c02010-09-17 13:10:40 +0200545#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
546 ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
547#else
Heiko Schocherbafe7432010-10-13 07:57:14 +0200548 adr r13, _start @ setup our mode stack (enter in banked mode)
549 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200550 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
Heiko Schochere48b7c02010-09-17 13:10:40 +0200551#endif
wdenk8ed96042005-01-09 23:16:25 +0000552
553 str lr, [r13] @ save caller lr in position 0 of saved stack
wdenk082acfd2005-01-10 00:01:04 +0000554 mrs lr, spsr @ get the spsr
555 str lr, [r13, #4] @ save spsr in position 1 of saved stack
wdenk8ed96042005-01-09 23:16:25 +0000556
557 mov r13, #MODE_SVC @ prepare SVC-Mode
558 @ msr spsr_c, r13
wdenk082acfd2005-01-10 00:01:04 +0000559 msr spsr, r13 @ switch modes, make sure moves will execute
560 mov lr, pc @ capture return pc
561 movs pc, lr @ jump to next instruction & switch modes.
wdenk8ed96042005-01-09 23:16:25 +0000562 .endm
563
564 .macro get_bad_stack_swi
wdenk082acfd2005-01-10 00:01:04 +0000565 sub r13, r13, #4 @ space on current stack for scratch reg.
566 str r0, [r13] @ save R0's value.
Heiko Schochere48b7c02010-09-17 13:10:40 +0200567#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
568 ldr r0, IRQ_STACK_START_IN @ get data regions start
569#else
wdenk8ed96042005-01-09 23:16:25 +0000570 ldr r0, _armboot_start @ get data regions start
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200571 sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
572 sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
Heiko Schochere48b7c02010-09-17 13:10:40 +0200573#endif
wdenk8ed96042005-01-09 23:16:25 +0000574 str lr, [r0] @ save caller lr in position 0 of saved stack
wdenk082acfd2005-01-10 00:01:04 +0000575 mrs r0, spsr @ get the spsr
576 str lr, [r0, #4] @ save spsr in position 1 of saved stack
577 ldr r0, [r13] @ restore r0
578 add r13, r13, #4 @ pop stack entry
wdenk8ed96042005-01-09 23:16:25 +0000579 .endm
580
581 .macro get_irq_stack @ setup IRQ stack
582 ldr sp, IRQ_STACK_START
583 .endm
584
585 .macro get_fiq_stack @ setup FIQ stack
586 ldr sp, FIQ_STACK_START
587 .endm
Magnus Liljadf812382009-06-13 20:50:00 +0200588#endif /* CONFIG_PRELOADER */
wdenk8ed96042005-01-09 23:16:25 +0000589
590/*
591 * exception handlers
592 */
Magnus Liljadf812382009-06-13 20:50:00 +0200593#ifdef CONFIG_PRELOADER
Kyungmin Park751b9b52008-01-17 16:43:25 +0900594 .align 5
595do_hang:
596 ldr sp, _TEXT_BASE /* use 32 words about stack */
597 bl hang /* hang and never return */
Magnus Liljadf812382009-06-13 20:50:00 +0200598#else /* !CONFIG_PRELOADER */
wdenk082acfd2005-01-10 00:01:04 +0000599 .align 5
wdenk8ed96042005-01-09 23:16:25 +0000600undefined_instruction:
601 get_bad_stack
602 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000603 bl do_undefined_instruction
wdenk8ed96042005-01-09 23:16:25 +0000604
605 .align 5
606software_interrupt:
607 get_bad_stack_swi
608 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000609 bl do_software_interrupt
wdenk8ed96042005-01-09 23:16:25 +0000610
611 .align 5
612prefetch_abort:
613 get_bad_stack
614 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000615 bl do_prefetch_abort
wdenk8ed96042005-01-09 23:16:25 +0000616
617 .align 5
618data_abort:
619 get_bad_stack
620 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000621 bl do_data_abort
wdenk8ed96042005-01-09 23:16:25 +0000622
623 .align 5
624not_used:
625 get_bad_stack
626 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000627 bl do_not_used
wdenk8ed96042005-01-09 23:16:25 +0000628
629#ifdef CONFIG_USE_IRQ
630
631 .align 5
632irq:
633 get_irq_stack
634 irq_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000635 bl do_irq
wdenk8ed96042005-01-09 23:16:25 +0000636 irq_restore_user_regs
637
638 .align 5
639fiq:
640 get_fiq_stack
641 /* someone ought to write a more effiction fiq_save_user_regs */
642 irq_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000643 bl do_fiq
wdenk8ed96042005-01-09 23:16:25 +0000644 irq_restore_user_regs
645
646#else
647
648 .align 5
649irq:
650 get_bad_stack
651 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000652 bl do_irq
wdenk8ed96042005-01-09 23:16:25 +0000653
654 .align 5
655fiq:
656 get_bad_stack
657 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000658 bl do_fiq
wdenk8ed96042005-01-09 23:16:25 +0000659
660#endif
661 .align 5
662.global arm1136_cache_flush
663arm1136_cache_flush:
Heiko Schocher7e4a9e62010-09-17 13:10:32 +0200664#if !defined(CONFIG_SYS_NO_ICACHE)
wdenk8ed96042005-01-09 23:16:25 +0000665 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
Heiko Schocher7e4a9e62010-09-17 13:10:32 +0200666#endif
667#if !defined(CONFIG_SYS_NO_DCACHE)
668 mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
669#endif
wdenk8ed96042005-01-09 23:16:25 +0000670 mov pc, lr @ back to caller
Magnus Liljadf812382009-06-13 20:50:00 +0200671#endif /* CONFIG_PRELOADER */