blob: 608bde3a2a3bb5ce8b808d231d9eaa671cf5ab88 [file] [log] [blame]
Peng Fan3f2b4d72021-08-07 16:01:13 +08001// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright 2021 NXP
4 */
5
Marcel Ziswilered7bda52022-11-07 22:22:37 +01006/ {
7 mu@27020000 {
8 compatible = "fsl,imx8ulp-mu";
9 reg = <0 0x27020000 0 0x10000>;
10 status = "okay";
Simon Glass8c103c32023-02-13 08:56:33 -070011 bootph-pre-ram;
Marcel Ziswilered7bda52022-11-07 22:22:37 +010012 };
13};
14
15&soc {
Simon Glass8c103c32023-02-13 08:56:33 -070016 bootph-pre-ram;
Peng Fan3f2b4d72021-08-07 16:01:13 +080017};
18
19&per_bridge3 {
Simon Glass8c103c32023-02-13 08:56:33 -070020 bootph-pre-ram;
Peng Fan3f2b4d72021-08-07 16:01:13 +080021};
22
23&per_bridge4 {
Simon Glass8c103c32023-02-13 08:56:33 -070024 bootph-pre-ram;
Peng Fan3f2b4d72021-08-07 16:01:13 +080025};
26
27&iomuxc1 {
Simon Glass8c103c32023-02-13 08:56:33 -070028 bootph-pre-ram;
Ye Li0e286222023-01-18 17:31:15 +080029 fsl,mux_mask = <0xf00>;
Peng Fan3f2b4d72021-08-07 16:01:13 +080030};
31
32&pinctrl_lpuart5 {
Simon Glass8c103c32023-02-13 08:56:33 -070033 bootph-pre-ram;
Peng Fan3f2b4d72021-08-07 16:01:13 +080034};
35
Peng Fan3f2b4d72021-08-07 16:01:13 +080036&lpuart5 {
Simon Glass8c103c32023-02-13 08:56:33 -070037 bootph-pre-ram;
Peng Fan3f2b4d72021-08-07 16:01:13 +080038};
39
40&usdhc0 {
Simon Glass8c103c32023-02-13 08:56:33 -070041 bootph-pre-ram;
Peng Fan3f2b4d72021-08-07 16:01:13 +080042};
43
44&pinctrl_usdhc0 {
Simon Glass8c103c32023-02-13 08:56:33 -070045 bootph-pre-ram;
Peng Fan3f2b4d72021-08-07 16:01:13 +080046};