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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Marek Vasut34df58a2018-01-10 11:47:03 +01002/*
3 * Device Tree Source extras for U-Boot for the ULCB board
4 *
5 * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
Marek Vasut34df58a2018-01-10 11:47:03 +01006 */
7
Marek Vasutc7d68122020-04-04 16:12:48 +02008#include "r8a77950-ulcb.dts"
9#include "r8a77950-u-boot.dtsi"
Marek Vasutd2038b22018-12-03 20:48:16 +010010
11/ {
12 cpld {
13 compatible = "renesas,ulcb-cpld";
14 status = "okay";
15 gpio-sck = <&gpio6 8 0>;
16 gpio-mosi = <&gpio6 7 0>;
17 gpio-miso = <&gpio6 10 0>;
18 gpio-sstbz = <&gpio2 3 0>;
19 };
Marek Vasut778fbe22021-07-03 18:16:14 +020020
21 sysinfo {
22 compatible = "renesas,rcar-sysinfo";
23 i2c-eeprom = <&sysinfo_eeprom>;
Simon Glass8c103c32023-02-13 08:56:33 -070024 bootph-all;
Marek Vasut778fbe22021-07-03 18:16:14 +020025 };
26};
27
28&i2c_dvfs {
Simon Glass8c103c32023-02-13 08:56:33 -070029 bootph-all;
Marek Vasut778fbe22021-07-03 18:16:14 +020030
31 sysinfo_eeprom: eeprom@50 {
32 compatible = "rohm,br24t01", "atmel,24c01";
33 reg = <0x50>;
34 pagesize = <8>;
Simon Glass8c103c32023-02-13 08:56:33 -070035 bootph-all;
Marek Vasut778fbe22021-07-03 18:16:14 +020036 status = "okay";
37 };
Marek Vasutd2038b22018-12-03 20:48:16 +010038};
Marek Vasut750a1472018-12-03 20:55:01 +010039
Marek Vasut16dcfbc2017-07-29 21:28:50 +020040&rpc {
41 reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
Marek Vasut3d5f45c2021-07-10 18:56:29 +020042 status = "disabled";
Marek Vasut16dcfbc2017-07-29 21:28:50 +020043};
44
Marek Vasut750a1472018-12-03 20:55:01 +010045&sdhi0 {
46 sd-uhs-sdr12;
47 sd-uhs-sdr25;
48 sd-uhs-sdr104;
49 max-frequency = <208000000>;
50};
51
52&sdhi2 {
Marek Vasut03578d92020-03-08 18:25:09 +010053 mmc-ddr-1_8v;
54 mmc-hs200-1_8v;
Marek Vasut750a1472018-12-03 20:55:01 +010055 mmc-hs400-1_8v;
56 max-frequency = <200000000>;
57};
Marek Vasut49d5fba2019-03-18 03:20:31 +010058
59&vcc_sdhi0 {
60 u-boot,off-on-delay-us = <20000>;
61};