blob: 531c263c9f466f9d6da2b2d69349bd6ef21f9353 [file] [log] [blame]
Patrick Delaunaya82abb12022-05-20 18:24:39 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5 */
6
7#include "stm32mp131.dtsi"
8
9/ {
10 soc {
11 m_can1: can@4400e000 {
12 compatible = "bosch,m_can";
13 reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
14 reg-names = "m_can", "message_ram";
15 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
16 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
17 interrupt-names = "int0", "int1";
Gabriel Fernandez2c8d5482022-11-24 11:36:05 +010018 clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
Patrick Delaunaya82abb12022-05-20 18:24:39 +020019 clock-names = "hclk", "cclk";
20 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
21 status = "disabled";
22 };
23
24 m_can2: can@4400f000 {
25 compatible = "bosch,m_can";
26 reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
27 reg-names = "m_can", "message_ram";
28 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
29 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
30 interrupt-names = "int0", "int1";
Gabriel Fernandez2c8d5482022-11-24 11:36:05 +010031 clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
Patrick Delaunaya82abb12022-05-20 18:24:39 +020032 clock-names = "hclk", "cclk";
33 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
34 status = "disabled";
35 };
36 };
37};