Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * board.h |
| 3 | * |
| 4 | * TI AM335x boards information header |
| 5 | * |
| 6 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ |
| 7 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef _BOARD_H_ |
| 12 | #define _BOARD_H_ |
| 13 | |
Jyri Sarha | 8c17cbd | 2016-12-09 12:29:13 +0200 | [diff] [blame^] | 14 | /** |
| 15 | * AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and |
| 16 | * REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame |
| 17 | * Synchronization Lost errors. The values are the biggest that work |
| 18 | * reliably with offered video modes and the memory subsystem on the |
| 19 | * boards. These register have are briefly documented in "7.3.3.5.2 |
| 20 | * Command Starvation" section of AM335x TRM. The REG_COS_COUNT_1 and |
| 21 | * REG_COS_COUNT_2 do not have any effect on current versions of |
| 22 | * AM335x. |
| 23 | */ |
| 24 | #define EMIF_OCP_CONFIG_BEAGLEBONE_BLACK 0x00141414 |
| 25 | #define EMIF_OCP_CONFIG_AM335X_EVM 0x003d3d3d |
| 26 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 27 | static inline int board_is_bone(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 28 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 29 | return board_ti_is("A335BONE"); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 30 | } |
| 31 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 32 | static inline int board_is_bone_lt(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 33 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 34 | return board_ti_is("A335BNLT"); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 35 | } |
| 36 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 37 | static inline int board_is_bbg1(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 38 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 39 | return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 40 | } |
| 41 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 42 | static inline int board_is_evm_sk(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 43 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 44 | return board_ti_is("A335X_SK"); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 45 | } |
| 46 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 47 | static inline int board_is_idk(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 48 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 49 | return !strncmp(board_ti_get_config(), "SKU#02", 6); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 50 | } |
| 51 | |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 52 | static inline int board_is_gp_evm(void) |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 53 | { |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 54 | return board_ti_is("A33515BB"); |
| 55 | } |
| 56 | |
| 57 | static inline int board_is_evm_15_or_later(void) |
| 58 | { |
| 59 | return (board_is_gp_evm() && |
| 60 | strncmp("1.5", board_ti_get_rev(), 3) <= 0); |
Tom Rini | ace4275 | 2013-07-18 15:13:01 -0400 | [diff] [blame] | 61 | } |
| 62 | |
Lokesh Vutla | a964332 | 2016-05-16 11:47:22 +0530 | [diff] [blame] | 63 | static inline int board_is_icev2(void) |
| 64 | { |
| 65 | return board_ti_is("A335_ICE") && !strncmp("2", board_ti_get_rev(), 1); |
| 66 | } |
| 67 | |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 68 | /* |
| 69 | * We have three pin mux functions that must exist. We must be able to enable |
| 70 | * uart0, for initial output and i2c0 to read the main EEPROM. We then have a |
| 71 | * main pinmux function that can be overridden to enable all other pinmux that |
| 72 | * is required on the board. |
| 73 | */ |
| 74 | void enable_uart0_pin_mux(void); |
Andrew Bradford | 6422b70 | 2012-10-25 08:21:30 -0400 | [diff] [blame] | 75 | void enable_uart1_pin_mux(void); |
| 76 | void enable_uart2_pin_mux(void); |
| 77 | void enable_uart3_pin_mux(void); |
| 78 | void enable_uart4_pin_mux(void); |
| 79 | void enable_uart5_pin_mux(void); |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 80 | void enable_i2c0_pin_mux(void); |
Nishanth Menon | 770e68c | 2016-02-24 12:30:55 -0600 | [diff] [blame] | 81 | void enable_board_pin_mux(void); |
Peter Korsgaard | e363426 | 2012-10-18 01:21:09 +0000 | [diff] [blame] | 82 | #endif |