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Hans de Goede53ab4af2015-04-15 19:03:49 +02001/*
2 * Copyright 2013 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
Hans de Goede53ab4af2015-04-15 19:03:49 +020021 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45#include "skeleton.dtsi"
46
47#include "sun5i.dtsi"
48
49#include <dt-bindings/dma/sun4i-a10.h>
Hans de Goede53ab4af2015-04-15 19:03:49 +020050
51/ {
52 interrupt-parent = <&intc>;
53
54 aliases {
55 ethernet0 = &emac;
56 };
57
58 chosen {
59 #address-cells = <1>;
60 #size-cells = <1>;
61 ranges;
62
Maxime Ripardf0e8e8d2015-10-15 22:04:08 +020063 framebuffer@2 {
64 compatible = "allwinner,simple-framebuffer",
65 "simple-framebuffer";
Jagan Teki13b36fa2018-08-05 00:40:08 +053066 allwinner,pipeline = "de_be0-lcd0-hdmi";
67 clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_HDMI>,
68 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DRAM_DE_BE>,
69 <&ccu CLK_DE_BE>, <&ccu CLK_HDMI>;
Maxime Ripardf0e8e8d2015-10-15 22:04:08 +020070 status = "disabled";
71 };
Hans de Goede53ab4af2015-04-15 19:03:49 +020072 };
73
Jagan Teki13b36fa2018-08-05 00:40:08 +053074 display-engine {
75 compatible = "allwinner,sun5i-a10s-display-engine";
76 allwinner,pipelines = <&fe0>;
Hans de Goede53ab4af2015-04-15 19:03:49 +020077 };
78
Jagan Teki13b36fa2018-08-05 00:40:08 +053079 soc@1c00000 {
80 hdmi: hdmi@1c16000 {
81 compatible = "allwinner,sun5i-a10s-hdmi";
82 reg = <0x01c16000 0x1000>;
83 interrupts = <58>;
84 clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>,
85 <&ccu CLK_PLL_VIDEO0_2X>,
86 <&ccu CLK_PLL_VIDEO1_2X>;
87 clock-names = "ahb", "mod", "pll-0", "pll-1";
88 dmas = <&dma SUN4I_DMA_NORMAL 16>,
89 <&dma SUN4I_DMA_NORMAL 16>,
90 <&dma SUN4I_DMA_DEDICATED 24>;
91 dma-names = "ddc-tx", "ddc-rx", "audio-tx";
Hans de Goede53ab4af2015-04-15 19:03:49 +020092 status = "disabled";
Jagan Teki13b36fa2018-08-05 00:40:08 +053093
94 ports {
95 #address-cells = <1>;
96 #size-cells = <0>;
97
98 hdmi_in: port@0 {
99 reg = <0>;
100
101 hdmi_in_tcon0: endpoint {
102 remote-endpoint = <&tcon0_out_hdmi>;
103 };
104 };
105
106 hdmi_out: port@1 {
107 #address-cells = <1>;
108 #size-cells = <0>;
109 reg = <1>;
110 };
111 };
Hans de Goede53ab4af2015-04-15 19:03:49 +0200112 };
113
Jagan Teki13b36fa2018-08-05 00:40:08 +0530114 pwm: pwm@1c20e00 {
Maxime Ripardf0e8e8d2015-10-15 22:04:08 +0200115 compatible = "allwinner,sun5i-a10s-pwm";
116 reg = <0x01c20e00 0xc>;
Jagan Teki13b36fa2018-08-05 00:40:08 +0530117 clocks = <&ccu CLK_HOSC>;
Maxime Ripardf0e8e8d2015-10-15 22:04:08 +0200118 #pwm-cells = <3>;
119 status = "disabled";
120 };
Hans de Goede53ab4af2015-04-15 19:03:49 +0200121 };
122};
123
Jagan Teki13b36fa2018-08-05 00:40:08 +0530124&ccu {
125 compatible = "allwinner,sun5i-a10s-ccu";
126};
127
Hans de Goede53ab4af2015-04-15 19:03:49 +0200128&pio {
129 compatible = "allwinner,sun5i-a10s-pinctrl";
130
131 uart0_pins_a: uart0@0 {
Jagan Teki13b36fa2018-08-05 00:40:08 +0530132 pins = "PB19", "PB20";
133 function = "uart0";
Hans de Goede53ab4af2015-04-15 19:03:49 +0200134 };
135
Jagan Teki13b36fa2018-08-05 00:40:08 +0530136 uart2_pins_b: uart2@1 {
137 pins = "PC18", "PC19";
138 function = "uart2";
Hans de Goede53ab4af2015-04-15 19:03:49 +0200139 };
140
Jagan Teki13b36fa2018-08-05 00:40:08 +0530141 emac_pins_b: emac0@1 {
142 pins = "PA0", "PA1", "PA2",
Hans de Goede53ab4af2015-04-15 19:03:49 +0200143 "PA3", "PA4", "PA5", "PA6",
144 "PA7", "PA8", "PA9", "PA10",
145 "PA11", "PA12", "PA13", "PA14",
146 "PA15", "PA16";
Jagan Teki13b36fa2018-08-05 00:40:08 +0530147 function = "emac";
Jelle van der Waa2ad76bf2015-09-07 22:43:57 +0200148 };
149
Hans de Goede53ab4af2015-04-15 19:03:49 +0200150 mmc1_pins_a: mmc1@0 {
Jagan Teki13b36fa2018-08-05 00:40:08 +0530151 pins = "PG3", "PG4", "PG5",
Hans de Goede8b1ba942015-06-02 15:53:40 +0200152 "PG6", "PG7", "PG8";
Jagan Teki13b36fa2018-08-05 00:40:08 +0530153 function = "mmc1";
154 drive-strength = <30>;
Hans de Goede53ab4af2015-04-15 19:03:49 +0200155 };
Boris Brezillonc1aa7d62016-06-15 21:09:28 +0200156
Jagan Teki13b36fa2018-08-05 00:40:08 +0530157 spi2_pins_b: spi2@1 {
158 pins = "PB12", "PB13", "PB14";
159 function = "spi2";
Boris Brezillonc1aa7d62016-06-15 21:09:28 +0200160 };
161
Jagan Teki13b36fa2018-08-05 00:40:08 +0530162 spi2_cs0_pins_b: spi2_cs0@1 {
163 pins = "PB11";
164 function = "spi2";
Boris Brezillonc1aa7d62016-06-15 21:09:28 +0200165 };
Hans de Goede53ab4af2015-04-15 19:03:49 +0200166};
Hans de Goede8b1ba942015-06-02 15:53:40 +0200167
168&sram_a {
Jagan Teki13b36fa2018-08-05 00:40:08 +0530169};
170
171&tcon0_out {
172 tcon0_out_hdmi: endpoint@2 {
173 reg = <2>;
174 remote-endpoint = <&hdmi_in_tcon0>;
175 allwinner,tcon-channel = <1>;
Hans de Goede8b1ba942015-06-02 15:53:40 +0200176 };
177};