Blame - arch/arm/mach-imx/speed.c - platform/external/u-boot

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Tom Rini	83d290c	2018-05-06 17:58:06 -0400	[diff] [blame]	1	// SPDX-License-Identifier: GPL-2.0+
Stefano Babic	c67bee1	2010-02-05 15:11:27 +0100	[diff] [blame]	2	/*
				3	* (C) Copyright 2000-2003
				4	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
				5	*
				6	* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
				7	* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
Stefano Babic	c67bee1	2010-02-05 15:11:27 +0100	[diff] [blame]	8	*/
				9
				10	#include <common.h>
				11	#include <asm/arch/imx-regs.h>
Stefano Babic	e4d3449	2010-03-05 17:54:37 +0100	[diff] [blame]	12	#include <asm/arch/clock.h>
Stefano Babic	c67bee1	2010-02-05 15:11:27 +0100	[diff] [blame]	13
John Rigby	2956532	2010-12-20 18:27:51 -0700	[diff] [blame]	14	#ifdef CONFIG_FSL_ESDHC
				15	DECLARE_GLOBAL_DATA_PTR;
				16	#endif
				17
Stefano Babic	c67bee1	2010-02-05 15:11:27 +0100	[diff] [blame]	18	int get_clocks(void)
				19	{
Stefano Babic	c67bee1	2010-02-05 15:11:27 +0100	[diff] [blame]	20	#ifdef CONFIG_FSL_ESDHC
Michael Langer	5c23712	2012-06-14 03:44:33 +0000	[diff] [blame]	21	#ifdef CONFIG_FSL_USDHC
Benoît Thébaudeau	3238465	2012-09-27 10:24:37 +0000	[diff] [blame]	22	#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
Simon Glass	e9adeca	2012-12-13 20:49:05 +0000	[diff] [blame]	23	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
Benoît Thébaudeau	3238465	2012-09-27 10:24:37 +0000	[diff] [blame]	24	#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
Simon Glass	e9adeca	2012-12-13 20:49:05 +0000	[diff] [blame]	25	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
Benoît Thébaudeau	3238465	2012-09-27 10:24:37 +0000	[diff] [blame]	26	#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
Simon Glass	e9adeca	2012-12-13 20:49:05 +0000	[diff] [blame]	27	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
Michael Langer	5c23712	2012-06-14 03:44:33 +0000	[diff] [blame]	28	#else
Simon Glass	e9adeca	2012-12-13 20:49:05 +0000	[diff] [blame]	29	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
Benoît Thébaudeau	3238465	2012-09-27 10:24:37 +0000	[diff] [blame]	30	#endif
				31	#else
				32	#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
Simon Glass	e9adeca	2012-12-13 20:49:05 +0000	[diff] [blame]	33	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
Benoît Thébaudeau	3238465	2012-09-27 10:24:37 +0000	[diff] [blame]	34	#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
Simon Glass	e9adeca	2012-12-13 20:49:05 +0000	[diff] [blame]	35	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
Benoît Thébaudeau	3238465	2012-09-27 10:24:37 +0000	[diff] [blame]	36	#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
Simon Glass	e9adeca	2012-12-13 20:49:05 +0000	[diff] [blame]	37	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
Benoît Thébaudeau	3238465	2012-09-27 10:24:37 +0000	[diff] [blame]	38	#else
Simon Glass	e9adeca	2012-12-13 20:49:05 +0000	[diff] [blame]	39	gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
Benoît Thébaudeau	3238465	2012-09-27 10:24:37 +0000	[diff] [blame]	40	#endif
Stefano Babic	c67bee1	2010-02-05 15:11:27 +0100	[diff] [blame]	41	#endif
Michael Langer	5c23712	2012-06-14 03:44:33 +0000	[diff] [blame]	42	#endif
Stefano Babic	c67bee1	2010-02-05 15:11:27 +0100	[diff] [blame]	43	return 0;
				44	}