blob: ff7669eba4d54df473cd2b6afe99d7cee52c7993 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glasse2e947f2015-08-30 16:55:42 -06002/*
3 * Google Veyron Jerry Rev 3+ board device tree source
4 *
5 * Copyright 2014 Google, Inc
Simon Glasse2e947f2015-08-30 16:55:42 -06006 */
7
8/dts-v1/;
9#include "rk3288-veyron-chromebook.dtsi"
10#include "cros-ec-sbs.dtsi"
11
12/ {
13 model = "Google Jerry";
14 compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
15 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
16 "google,veyron-jerry-rev3", "google,veyron-jerry",
17 "google,veyron", "rockchip,rk3288";
18
19 chosen {
20 stdout-path = &uart2;
21 };
22
Simon Glass32384742017-05-31 17:57:26 -060023 panel_regulator: panel-regulator {
Simon Glasse2e947f2015-08-30 16:55:42 -060024 compatible = "regulator-fixed";
25 enable-active-high;
26 gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
27 pinctrl-names = "default";
28 pinctrl-0 = <&lcd_enable_h>;
29 regulator-name = "panel_regulator";
30 vin-supply = <&vcc33_sys>;
31 };
32
33 vcc18_lcd: vcc18-lcd {
34 compatible = "regulator-fixed";
35 enable-active-high;
36 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&avdd_1v8_disp_en>;
39 regulator-name = "vcc18_lcd";
40 regulator-always-on;
41 regulator-boot-on;
42 vin-supply = <&vcc18_wl>;
43 };
44
45 backlight_regulator: backlight-regulator {
46 compatible = "regulator-fixed";
47 enable-active-high;
48 gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
49 pinctrl-names = "default";
50 pinctrl-0 = <&bl_pwr_en>;
51 regulator-name = "backlight_regulator";
52 vin-supply = <&vcc33_sys>;
53 startup-delay-us = <15000>;
54 };
Simon Glass2d0c01b2018-12-27 20:15:23 -070055
56 sound {
57 compatible = "rockchip,audio-max98090-jerry";
58
59 cpu {
60 sound-dai = <&i2s 0>;
61 };
62
63 codec {
64 sound-dai = <&max98090 0>;
65 };
66 };
Simon Glasse2e947f2015-08-30 16:55:42 -060067};
68
69&gpio_keys {
70 power {
71 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
72 };
73};
74
75&backlight {
76 power-supply = <&backlight_regulator>;
77};
78
79&panel {
80 power-supply= <&panel_regulator>;
81};
82
83&rk808 {
84 pinctrl-names = "default";
85 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
86 dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
87 <&gpio7 15 GPIO_ACTIVE_HIGH>;
88
89 regulators {
90 mic_vcc: LDO_REG2 {
91 regulator-always-on;
92 regulator-boot-on;
93 regulator-min-microvolt = <1800000>;
94 regulator-max-microvolt = <1800000>;
95 regulator-name = "mic_vcc";
96 regulator-suspend-mem-disabled;
97 };
98 };
99};
100
101&sdmmc {
102 pinctrl-names = "default";
103 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
104 &sdmmc_bus4>;
105 disable-wp;
106};
107
108&vcc_5v {
109 enable-active-high;
110 gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&drv_5v>;
113};
114
115&vcc50_hdmi {
116 enable-active-high;
117 gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
118 pinctrl-names = "default";
119 pinctrl-0 = <&vcc50_hdmi_en>;
120};
121
Simon Glasse2e947f2015-08-30 16:55:42 -0600122&edp {
123 pinctrl-names = "default";
124 pinctrl-0 = <&edp_hpd>;
125};
126
127&pinctrl {
128 backlight {
129 bl_pwr_en: bl_pwr_en {
130 rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
131 };
132 };
133
134 buck-5v {
135 drv_5v: drv-5v {
136 rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
137 };
138 };
139
140 edp {
141 edp_hpd: edp_hpd {
142 rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
143 };
144 };
145
146 emmc {
147 /* Make sure eMMC is not in reset */
148 emmc_deassert_reset: emmc-deassert-reset {
149 rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
150 };
151 };
152
153 hdmi {
154 vcc50_hdmi_en: vcc50-hdmi-en {
155 rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
156 };
157 };
158
159 lcd {
160 lcd_enable_h: lcd-en {
161 rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
162 };
163
164 avdd_1v8_disp_en: avdd-1v8-disp-en {
165 rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
166 };
167 };
168
169 pmic {
170 dvs_1: dvs-1 {
171 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
172 };
173
174 dvs_2: dvs-2 {
175 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
176 };
177 };
178};
179
180&i2c4 {
181 status = "okay";
182
183 /*
184 * Trackpad pin control is shared between Elan and Synaptics devices
185 * so we have to pull it up to the bus level.
186 */
187 pinctrl-names = "default";
188 pinctrl-0 = <&i2c4_xfer &trackpad_int>;
189
190 trackpad@15 {
191 compatible = "elan,i2c_touchpad";
192 interrupt-parent = <&gpio7>;
193 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
194 /*
195 * Remove the inherited pinctrl settings to avoid clashing
196 * with bus-wide ones.
197 */
198 /delete-property/pinctrl-names;
199 /delete-property/pinctrl-0;
200 reg = <0x15>;
201 vcc-supply = <&vcc33_io>;
202 wakeup-source;
203 };
204
205 trackpad@2c {
206 compatible = "hid-over-i2c";
207 interrupt-parent = <&gpio7>;
208 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
209 reg = <0x2c>;
210 hid-descr-addr = <0x0020>;
211 vcc-supply = <&vcc33_io>;
212 wakeup-source;
213 };
214};