blob: 38a5f0837690335f5510da0b6fc721d0cd16c3e9 [file] [log] [blame]
Ramon Fried914026d2019-04-27 11:15:21 +03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * PCI Endpoint uclass
4 *
5 * Based on Linux PCI-EP driver written by
6 * Kishon Vijay Abraham I <kishon@ti.com>
7 *
8 * Copyright (c) 2019
9 * Written by Ramon Fried <ramon.fried@gmail.com>
10 */
11
12#include <common.h>
13#include <dm.h>
14#include <errno.h>
15#include <linux/log2.h>
16#include <pci_ep.h>
17
18DECLARE_GLOBAL_DATA_PTR;
19
20int pci_ep_write_header(struct udevice *dev, uint fn, struct pci_ep_header *hdr)
21{
22 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
23
24 if (!ops->write_header)
25 return -ENOSYS;
26
27 return ops->write_header(dev, fn, hdr);
28}
29
30int pci_ep_read_header(struct udevice *dev, uint fn, struct pci_ep_header *hdr)
31{
32 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
33
34 if (!ops->read_header)
35 return -ENOSYS;
36
37 return ops->read_header(dev, fn, hdr);
38}
39
40int pci_ep_set_bar(struct udevice *dev, uint func_no, struct pci_bar *ep_bar)
41{
42 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
43 int flags = ep_bar->flags;
44
45 /* Some basic bar validity checks */
Ramon Fried6948f102019-07-31 11:04:26 +030046 if (ep_bar->barno > BAR_5 || ep_bar->barno < BAR_0)
Ramon Fried914026d2019-04-27 11:15:21 +030047 return -EINVAL;
48
49 if ((ep_bar->barno == BAR_5 &&
50 (flags & PCI_BASE_ADDRESS_MEM_TYPE_64)) ||
51 ((flags & PCI_BASE_ADDRESS_SPACE_IO) &&
52 (flags & PCI_BASE_ADDRESS_IO_MASK)) ||
53 (upper_32_bits(ep_bar->size) &&
54 !(flags & PCI_BASE_ADDRESS_MEM_TYPE_64)))
55 return -EINVAL;
56
57 if (!ops->set_bar)
58 return -ENOSYS;
59
60 return ops->set_bar(dev, func_no, ep_bar);
61}
62
63int pci_ep_read_bar(struct udevice *dev, uint func_no, struct pci_bar *ep_bar,
64 enum pci_barno barno)
65{
66 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
67
68 /* Some basic bar validity checks */
69 if (barno > BAR_5 || barno < BAR_0)
70 return -EINVAL;
71
72 if (!ops->read_bar)
73 return -ENOSYS;
74
75 return ops->read_bar(dev, func_no, ep_bar, barno);
76}
77
78int pci_ep_clear_bar(struct udevice *dev, uint func_num, enum pci_barno bar)
79{
80 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
81
82 if (!ops->clear_bar)
83 return -ENOSYS;
84
85 return ops->clear_bar(dev, func_num, bar);
86}
87
88int pci_ep_map_addr(struct udevice *dev, uint func_no, phys_addr_t addr,
89 u64 pci_addr, size_t size)
90{
91 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
92
93 if (!ops->map_addr)
94 return -ENOSYS;
95
96 return ops->map_addr(dev, func_no, addr, pci_addr, size);
97}
98
99int pci_ep_unmap_addr(struct udevice *dev, uint func_no, phys_addr_t addr)
100{
101 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
102
103 if (!ops->unmap_addr)
104 return -ENOSYS;
105
106 return ops->unmap_addr(dev, func_no, addr);
107}
108
109int pci_ep_set_msi(struct udevice *dev, uint func_no, uint interrupts)
110{
111 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
112 uint encode_int;
113
114 if (interrupts > 32)
115 return -EINVAL;
116
117 if (!ops->set_msi)
118 return -ENOSYS;
119
120 /* MSI spec permits allocation of
121 * only 1, 2, 4, 8, 16, 32 interrupts
122 */
123 encode_int = order_base_2(interrupts);
124
125 return ops->set_msi(dev, func_no, encode_int);
126}
127
128int pci_ep_get_msi(struct udevice *dev, uint func_no)
129{
130 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
131 int interrupt;
132
133 if (!ops->get_msi)
134 return -ENOSYS;
135
136 interrupt = ops->get_msi(dev, func_no);
137
138 if (interrupt < 0)
139 return 0;
140
141 /* Translate back from order base 2*/
142 interrupt = 1 << interrupt;
143
144 return interrupt;
145}
146
147int pci_ep_set_msix(struct udevice *dev, uint func_no, uint interrupts)
148{
149 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
150
151 if (interrupts < 1 || interrupts > 2048)
152 return -EINVAL;
153
154 if (!ops->set_msix)
155 return -ENOSYS;
156
157 return ops->set_msix(dev, func_no, interrupts - 1);
158}
159
160int pci_ep_get_msix(struct udevice *dev, uint func_no)
161{
162 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
163 int interrupt;
164
165 if (!ops->get_msix)
166 return -ENOSYS;
167
168 interrupt = ops->get_msix(dev, func_no);
169
170 if (interrupt < 0)
171 return 0;
172
173 return interrupt + 1;
174}
175
176int pci_ep_raise_irq(struct udevice *dev, uint func_no,
177 enum pci_ep_irq_type type, uint interrupt_num)
178{
179 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
180
181 if (!ops->raise_irq)
182 return -ENOSYS;
183
184 return ops->raise_irq(dev, func_no, type, interrupt_num);
185}
186
187int pci_ep_start(struct udevice *dev)
188{
189 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
190
191 if (!ops->start)
192 return -ENOSYS;
193
194 return ops->start(dev);
195}
196
197int pci_ep_stop(struct udevice *dev)
198{
199 struct pci_ep_ops *ops = pci_ep_get_ops(dev);
200
201 if (!ops->stop)
202 return -ENOSYS;
203
204 return ops->stop(dev);
205}
206
207UCLASS_DRIVER(pci_ep) = {
208 .id = UCLASS_PCI_EP,
209 .name = "pci_ep",
210 .flags = DM_UC_FLAG_SEQ_ALIAS,
211};
Xiaowei Baofd00c532020-07-09 23:31:34 +0800212
213void pci_ep_init(void)
214{
215 struct udevice *dev;
216
217 for (uclass_first_device_check(UCLASS_PCI_EP, &dev);
218 dev;
219 uclass_next_device_check(&dev)) {
220 ;
221 }
222}