blob: b96557148aa03af128ab4083397e34ef763744c5 [file] [log] [blame]
Stefan Roeseb79316f2005-08-15 12:31:23 +02001/*
2 * (C) Copyright 2004 Sandburst Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23/************************************************************************
24 * METROBOX.h - configuration Sandburst MetroBox
25 ***********************************************************************/
26
27/*
28 * $Id: METROBOX.h,v 1.21 2005/06/03 15:05:25 tsawyer Exp $
29 *
30 *
31 * $Log: METROBOX.h,v $
32 * Revision 1.21 2005/06/03 15:05:25 tsawyer
33 * MB rev 2.0.3 KA rev 0.0.7. Add CONFIG_VERSION_VARIABLE, Add fakeled to MB
34 *
35 * Revision 1.20 2005/04/11 20:51:11 tsawyer
36 * fix ethernet
37 *
38 * Revision 1.19 2005/04/06 15:13:36 tsawyer
39 * Update appropriate files to coincide with u-boot 1.1.3
40 *
41 * Revision 1.18 2005/03/10 14:16:02 tsawyer
42 * add def'n for cis8201 short etch option.
43 *
44 * Revision 1.17 2005/03/09 19:49:51 tsawyer
45 * Remove KGDB to allow use of 2nd serial port
46 *
47 * Revision 1.16 2004/12/02 19:00:23 tsawyer
48 * Add misc_init_f to turn on i2c-1 and all four fans before sdram init
49 *
50 * Revision 1.15 2004/09/15 18:04:12 tsawyer
51 * add multiple serial port support
52 *
53 * Revision 1.14 2004/09/03 15:27:51 tsawyer
54 * All metrobox boards are at 66.66 sys clock
55 *
56 * Revision 1.13 2004/08/05 20:27:46 tsawyer
57 * Remove system ace definitions, add net console support
58 *
59 * Revision 1.12 2004/07/29 20:00:13 tsawyer
60 * Add i2c bus 1
61 *
62 * Revision 1.11 2004/07/21 13:44:18 tsawyer
63 * SystemACE is out, CF direct to local bus is in
64 *
65 * Revision 1.10 2004/06/29 19:08:55 tsawyer
66 * Add CONFIG_MISC_INIT_R
67 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020068 * Revision 1.9 2004/06/28 21:30:53 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020069 * Fix default BOOTARGS
70 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020071 * Revision 1.8 2004/06/17 15:51:08 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020072 * auto complete
73 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020074 * Revision 1.7 2004/06/17 15:08:49 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020075 * Add autocomplete
76 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020077 * Revision 1.6 2004/06/15 12:33:57 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020078 * debugging checkpoint
79 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020080 * Revision 1.5 2004/06/12 19:48:28 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020081 * Debugging checkpoint
82 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020083 * Revision 1.4 2004/06/02 13:03:06 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020084 * Fix eth addrs
85 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020086 * Revision 1.3 2004/05/18 19:56:10 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020087 * Change default bootcommand to pImage.metrobox
88 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020089 * Revision 1.2 2004/05/18 14:13:44 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020090 * Add bringup values for bootargs and bootcommand.
91 * Remove definition of ipaddress and serverip addresses.
92 *
Wolfgang Denk3d078ce2005-08-15 16:03:56 +020093 * Revision 1.1 2004/04/16 15:08:54 tsawyer
Stefan Roeseb79316f2005-08-15 12:31:23 +020094 * Initial Revision
95 *
96 *
97 */
98
99#ifndef __CONFIG_H
100#define __CONFIG_H
101
102/*-----------------------------------------------------------------------
103 * High Level Configuration Options
104 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200105#define CONFIG_METROBOX 1 /* Board is Metrobox */
106#define CONFIG_440GX 1 /* Specifc GX support */
107#define CONFIG_4xx 1 /* ... PPC4xx family */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200108#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200109#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
110#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200111#undef CFG_DRAM_TEST /* Disable-takes long time!*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200112#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200113
114#define CONFIG_VERY_BIG_RAM 1
115#define CONFIG_VERSION_VARIABLE
116
117#define CONFIG_IDENT_STRING " Sandburst Metrobox"
118
119/*-----------------------------------------------------------------------
120 * Base addresses -- Note these are effective addresses where the
121 * actual resources get mapped (not physical addresses)
122 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200123#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
124#define CFG_FLASH_BASE 0xfff80000 /* start of FLASH */
125#define CFG_MONITOR_BASE 0xfff80000 /* start of monitor */
126#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
127#define CFG_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
128#define CFG_ISRAM_BASE 0xc0000000 /* internal SRAM */
129#define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200130
131#define CFG_NVRAM_BASE_ADDR (CFG_PERIPHERAL_BASE + 0x08000000)
132#define CFG_FPGA_BASE (CFG_PERIPHERAL_BASE + 0x08200000)
133#define CFG_BME32_BASE (CFG_PERIPHERAL_BASE + 0x08500000)
134#define CFG_GPIO_BASE (CFG_PERIPHERAL_BASE + 0x00000700)
135
136/*-----------------------------------------------------------------------
137 * Initial RAM & stack pointer (placed in internal SRAM)
138 *----------------------------------------------------------------------*/
139#define CFG_TEMP_STACK_OCM 1
140#define CFG_OCM_DATA_ADDR CFG_ISRAM_BASE
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200141#define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE /* Initial RAM address */
142#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
143#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200144
145#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
146#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
147#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
148
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200149#define CFG_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */
150#define CFG_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200151
152/*-----------------------------------------------------------------------
153 * Serial Port
154 *----------------------------------------------------------------------*/
155#undef CONFIG_SERIAL_SOFTWARE_FIFO
156#define CONFIG_SERIAL_MULTI 1
157#define CONFIG_BAUDRATE 9600
158
159#define CFG_BAUDRATE_TABLE \
160 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
161
162/*-----------------------------------------------------------------------
163 * NVRAM/RTC
164 *
165 * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
166 * The DS1743 code assumes this condition (i.e. -- it assumes the base
167 * address for the RTC registers is:
168 *
169 * CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE
170 *
171 *----------------------------------------------------------------------*/
172#define CFG_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200173#define CONFIG_RTC_DS174x 1 /* DS1743 RTC */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200174
175/*-----------------------------------------------------------------------
176 * FLASH related
177 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200178#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
179#define CFG_MAX_FLASH_SECT 8 /* sectors per device */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200180
181#undef CFG_FLASH_CHECKSUM
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200182#define CFG_FLASH_ERASE_TOUT 120000 /* Flash Erase TO (in ms) */
183#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write TO(in ms) */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200184
185/*-----------------------------------------------------------------------
186 * DDR SDRAM
187 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200188#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup*/
189#define SPD_EEPROM_ADDRESS {0x53} /* SPD i2c spd addresses */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200190
191/*-----------------------------------------------------------------------
192 * I2C
193 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200194#define CONFIG_HARD_I2C 1 /* I2C hardware support */
195#undef CONFIG_SOFT_I2C /* I2C !bit-banged */
196#define CFG_I2C_SPEED 400000 /* I2C speed 400kHz */
197#define CFG_I2C_SLAVE 0x7F /* I2C slave address */
198#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
199#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200200
201
202/*-----------------------------------------------------------------------
203 * Environment
204 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200205#define CFG_ENV_IS_IN_NVRAM 1 /* Environment uses NVRAM */
206#undef CFG_ENV_IS_IN_FLASH /* ... not in flash */
207#undef CFG_ENV_IS_IN_EEPROM /* ... not in EEPROM */
208#define CONFIG_ENV_OVERWRITE 1 /* allow env overwrite */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200209
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200210#define CFG_ENV_SIZE 0x1000 /* Size of Env vars */
211#define CFG_ENV_ADDR (CFG_NVRAM_BASE_ADDR)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200212
213#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/nfs rw nfsroot=$serverip:/home/metrobox0 nfsaddrs=$ipaddr:::::eth0:none "
214#define CONFIG_BOOTCOMMAND "tftp 8000000 pImage.metrobox;bootm 8000000"
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200215#define CONFIG_BOOTDELAY 5 /* disable autoboot */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200216
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200217#define CONFIG_LOADS_ECHO 1 /* echo on for serial dnld */
218#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200219
220/*-----------------------------------------------------------------------
221 * Networking
222 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200223#define CONFIG_MII 1 /* MII PHY management */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200224#define CONFIG_NET_MULTI 1
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200225#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */
226#define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */
227#define CONFIG_PHY2_ADDR 0x08 /* PHY addr, MGMT, EMAC2 */
228#define CONFIG_PHY3_ADDR 0x18 /* PHY addr, LCL, EMAC3 */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200229#define CONFIG_HAS_ETH0
230#define CONFIG_HAS_ETH1
231#define CONFIG_HAS_ETH2
232#define CONFIG_HAS_ETH3
Stefan Roesed6c61aa2005-08-16 18:18:00 +0200233#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200234#define CONFIG_CIS8201_PHY 1 /* RGMII mode for Cicada */
235#define CONFIG_CIS8201_SHORT_ETCH 1 /* Use short etch mode */
236#define CONFIG_PHY_GIGE 1 /* GbE speed/duplex detect */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200237#define CONFIG_PHY_RESET_DELAY 1000
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200238#define CONFIG_NETMASK 255.255.0.0
239#define CONFIG_ETHADDR 00:00:00:00:00:00 /* No EMAC 0 support */
240#define CONFIG_ETH1ADDR 00:00:00:00:00:00 /* No EMAC 1 support */
241#define CFG_RX_ETH_BUFFER 32 /* #eth rx buff & descrs */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200242
243
244/*-----------------------------------------------------------------------
245 * Console/Commands/Parser
246 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200247#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
248 CFG_CMD_PCI | \
249 CFG_CMD_IRQ | \
250 CFG_CMD_I2C | \
251 CFG_CMD_DHCP | \
252 CFG_CMD_DATE | \
253 CFG_CMD_BEDBUG | \
254 CFG_CMD_PING | \
255 CFG_CMD_DIAG | \
256 CFG_CMD_MII | \
257 CFG_CMD_NET | \
258 CFG_CMD_ELF | \
259 CFG_CMD_IDE | \
260 CFG_CMD_FAT)
Stefan Roeseb79316f2005-08-15 12:31:23 +0200261
262/* tbs 09-March-2005 Removed to be able to use 2nd serial */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200263/* CFG_CMD_KGDB | \ */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200264
265
266/* Include NetConsole support */
267#define CONFIG_NETCONSOLE
268
269/* Include auto complete with tabs */
270#define CONFIG_AUTO_COMPLETE 1
271#define CFG_AUTO_COMPLETE 1
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200272#define CFG_ALT_MEMTEST 1 /* use real memory test */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200273
274
275/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
276#include <cmd_confdefs.h>
277
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200278#define CFG_LONGHELP /* undef to save memory */
279#define CFG_PROMPT "MetroBox=> " /* Monitor Command Prompt */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200280
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200281#define CFG_HUSH_PARSER 1 /* HUSH for ext'd cli */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200282#define CFG_PROMPT_HUSH_PS2 "> "
283
284
285/*-----------------------------------------------------------------------
286 * Console Buffer
287 *----------------------------------------------------------------------*/
288#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200289#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200290#else
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200291#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200292#endif
293#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200294 /* Print Buffer Size */
295#define CFG_MAXARGS 16 /* max number of cmd args */
296#define CFG_BARGSIZE CFG_CBSIZE /* Boot Arg Buffer Size */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200297
298/*-----------------------------------------------------------------------
299 * Memory Test
300 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200301#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
302#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200303
304/*-----------------------------------------------------------------------
305 * Compact Flash (in true IDE mode)
306 *----------------------------------------------------------------------*/
307#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
308#undef CONFIG_IDE_LED /* no led for ide supported */
309
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200310#define CONFIG_IDE_RESET /* reset for ide supported */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200311#define CFG_IDE_MAXBUS 1 /* max. 1 IDE busses */
312#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */
313
314#define CFG_ATA_BASE_ADDR 0xF0000000
315#define CFG_ATA_IDE0_OFFSET 0x0000
316#define CFG_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */
317#define CFG_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses*/
318#define CFG_ATA_ALT_OFFSET 0x100000 /* Offset for alternate registers */
319
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200320#define CFG_ATA_STRIDE 2 /* Directly connected CF, needs a stride
321 to get to the correct offset */
322#define CONFIG_DOS_PARTITION 1 /* Include dos partition */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200323
324/*-----------------------------------------------------------------------
325 * PCI
326 *----------------------------------------------------------------------*/
327/* General PCI */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200328#define CONFIG_PCI /* include pci support */
329#define CONFIG_PCI_PNP /* do pci plug-and-play */
330#define CONFIG_PCI_SCAN_SHOW /* show pci devices */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200331#define CFG_PCI_TARGBASE (CFG_PCI_MEMBASE)
332
333/* Board-specific PCI */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200334#define CFG_PCI_PRE_INIT /* enable board pci_pre_init*/
335#define CFG_PCI_TARGET_INIT /* let board init pci target*/
Stefan Roeseb79316f2005-08-15 12:31:23 +0200336
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200337#define CFG_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */
338#define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200339
340/*
341 * For booting Linux, the board info and command line data
342 * have to be in the first 8 MB of memory, since this is
343 * the maximum mapped by the Linux kernel during initialization.
344 */
345#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
346/*-----------------------------------------------------------------------
347 * Cache Configuration
348 */
Wolfgang Denk0c8721a2005-09-23 11:05:55 +0200349#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200350#define CFG_CACHELINE_SIZE 32
351#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200352#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200353#endif
354
355/*
356 * Internal Definitions
357 *
358 * Boot Flags
359 */
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200360#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */
361#define BOOTFLAG_WARM 0x02 /* Software reboot */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200362
363#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200364#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
365#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200366#endif
367
368/*-----------------------------------------------------------------------
369 * Miscellaneous configurable options
370 *----------------------------------------------------------------------*/
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200371#undef CONFIG_WATCHDOG /* watchdog disabled */
372#define CFG_LOAD_ADDR 0x8000000 /* default load address */
373#define CFG_EXTBDINFO 1 /* use extended board_info */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200374
Wolfgang Denk3d078ce2005-08-15 16:03:56 +0200375#define CFG_HZ 100 /* decr freq: 1 ms ticks */
Stefan Roeseb79316f2005-08-15 12:31:23 +0200376
377
378#endif /* __CONFIG_H */