blob: 731b539eaabe8bc1c14e5bae69b75c0dd82957c1 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060017#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000018#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000019#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000020#if defined(CONFIG_CMD_IDE)
21#include <ide.h>
22#endif
23#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000024#include <initcall.h>
25#include <logbuff.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000026
27/* TODO: Can we move these into arch/ headers? */
28#ifdef CONFIG_8xx
29#include <mpc8xx.h>
30#endif
31#ifdef CONFIG_5xx
32#include <mpc5xx.h>
33#endif
34#ifdef CONFIG_MPC5xxx
35#include <mpc5xxx.h>
36#endif
Gabriel Huauec3b4822014-09-03 13:57:54 -070037#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Gabriel Huaua76df702014-07-26 11:35:43 -070038#include <asm/mp.h>
39#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000040
Simon Glassa733b062013-04-26 02:53:43 +000041#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000042#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000043#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020044#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070045#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000046#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000047#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000048#include <asm/io.h>
49#include <asm/sections.h>
Simon Glass48a33802013-03-05 14:39:52 +000050#ifdef CONFIG_X86
51#include <asm/init_helpers.h>
52#include <asm/relocate.h>
53#endif
Simon Glassa733b062013-04-26 02:53:43 +000054#ifdef CONFIG_SANDBOX
55#include <asm/state.h>
56#endif
Simon Glassab7cd622014-07-23 06:55:04 -060057#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000058#include <linux/compiler.h>
59
60/*
61 * Pointer to initial global data area
62 *
63 * Here we initialize it if needed.
64 */
65#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66#undef XTRN_DECLARE_GLOBAL_DATA_PTR
67#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
69#else
70DECLARE_GLOBAL_DATA_PTR;
71#endif
72
73/*
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
76 *
77 * void led_set_state(enum led_colour_t colour, int on);
78 */
79/************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
83 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020084__weak void coloured_LED_init(void) {}
85__weak void red_led_on(void) {}
86__weak void red_led_off(void) {}
87__weak void green_led_on(void) {}
88__weak void green_led_off(void) {}
89__weak void yellow_led_on(void) {}
90__weak void yellow_led_off(void) {}
91__weak void blue_led_on(void) {}
92__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000093
94/*
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
97 *
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
102 * a structure...
103 */
104
105/*
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
107 */
108
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800109#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000110static int init_func_watchdog_init(void)
111{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800112# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Heiko Schocher2b8b38e2015-01-21 08:38:21 +0100114 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800115 hw_watchdog_init();
116# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000117 puts(" Watchdog enabled\n");
118 WATCHDOG_RESET();
119
120 return 0;
121}
122
123int init_func_watchdog_reset(void)
124{
125 WATCHDOG_RESET();
126
127 return 0;
128}
129#endif /* CONFIG_WATCHDOG */
130
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200131__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000132{
133 /* please define platform specific board_add_ram_info() */
134}
135
Simon Glass1938f4a2013-03-11 06:49:53 +0000136static int init_baud_rate(void)
137{
138 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
139 return 0;
140}
141
142static int display_text_info(void)
143{
Simon Glassa733b062013-04-26 02:53:43 +0000144#ifndef CONFIG_SANDBOX
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100145 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000146
Simon Glass632efa72013-03-11 07:06:48 +0000147 bss_start = (ulong)&__bss_start;
148 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100149
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800150#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100151 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800152#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100153 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800154#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100155
156 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
157 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000158#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000159
160#ifdef CONFIG_MODEM_SUPPORT
161 debug("Modem Support enabled\n");
162#endif
163#ifdef CONFIG_USE_IRQ
164 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
165 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
166#endif
167
168 return 0;
169}
170
171static int announce_dram_init(void)
172{
173 puts("DRAM: ");
174 return 0;
175}
176
angelo@sysam.ite310b932015-02-12 01:40:17 +0100177#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000178static int init_func_ram(void)
179{
180#ifdef CONFIG_BOARD_TYPES
181 int board_type = gd->board_type;
182#else
183 int board_type = 0; /* use dummy arg */
184#endif
185
186 gd->ram_size = initdram(board_type);
187
188 if (gd->ram_size > 0)
189 return 0;
190
191 puts("*** failed ***\n");
192 return 1;
193}
194#endif
195
Simon Glass1938f4a2013-03-11 06:49:53 +0000196static int show_dram_config(void)
197{
York Sunfa39ffe2014-05-02 17:28:05 -0700198 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000199
200#ifdef CONFIG_NR_DRAM_BANKS
201 int i;
202
203 debug("\nRAM Configuration:\n");
204 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
205 size += gd->bd->bi_dram[i].size;
206 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
207#ifdef DEBUG
208 print_size(gd->bd->bi_dram[i].size, "\n");
209#endif
210 }
211 debug("\nDRAM: ");
212#else
213 size = gd->ram_size;
214#endif
215
Simon Glasse4fef6c2013-03-11 14:30:42 +0000216 print_size(size, "");
217 board_add_ram_info(0);
218 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000219
220 return 0;
221}
222
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200223__weak void dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000224{
225#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
226 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
227 gd->bd->bi_dram[0].size = get_effective_memsize();
228#endif
229}
230
Heiko Schocherea818db2013-01-29 08:53:15 +0100231#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000232static int init_func_i2c(void)
233{
234 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200235#ifdef CONFIG_SYS_I2C
236 i2c_init_all();
237#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000238 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200239#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000240 puts("ready\n");
241 return 0;
242}
243#endif
244
245#if defined(CONFIG_HARD_SPI)
246static int init_func_spi(void)
247{
248 puts("SPI: ");
249 spi_init();
250 puts("ready\n");
251 return 0;
252}
253#endif
254
255__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000256static int zero_global_data(void)
257{
258 memset((void *)gd, '\0', sizeof(gd_t));
259
260 return 0;
261}
262
263static int setup_mon_len(void)
264{
Michal Simeke945f6d2014-05-08 16:08:44 +0200265#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100266 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Simon Glassa733b062013-04-26 02:53:43 +0000267#elif defined(CONFIG_SANDBOX)
268 gd->mon_len = (ulong)&_end - (ulong)_init;
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800269#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800270 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Simon Glass632efa72013-03-11 07:06:48 +0000271#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000272 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
273 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000274#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000275 return 0;
276}
277
278__weak int arch_cpu_init(void)
279{
280 return 0;
281}
282
Simon Glassf828bf22013-04-20 08:42:41 +0000283#ifdef CONFIG_OF_HOSTFILE
284
Simon Glassf828bf22013-04-20 08:42:41 +0000285static int read_fdt_from_file(void)
286{
287 struct sandbox_state *state = state_get_current();
Simon Glass95fac6a2014-02-27 13:25:58 -0700288 const char *fname = state->fdt_fname;
Simon Glassf828bf22013-04-20 08:42:41 +0000289 void *blob;
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800290 loff_t size;
Simon Glassf828bf22013-04-20 08:42:41 +0000291 int err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700292 int fd;
Simon Glassf828bf22013-04-20 08:42:41 +0000293
294 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
295 if (!state->fdt_fname) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700296 err = fdt_create_empty_tree(blob, 256);
Simon Glassf828bf22013-04-20 08:42:41 +0000297 if (!err)
298 goto done;
Simon Glass95fac6a2014-02-27 13:25:58 -0700299 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
300 return -EINVAL;
Simon Glassf828bf22013-04-20 08:42:41 +0000301 }
Simon Glass95fac6a2014-02-27 13:25:58 -0700302
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800303 err = os_get_filesize(fname, &size);
304 if (err < 0) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700305 printf("Failed to file FDT file '%s'\n", fname);
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800306 return err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700307 }
308 fd = os_open(fname, OS_O_RDONLY);
309 if (fd < 0) {
310 printf("Failed to open FDT file '%s'\n", fname);
311 return -EACCES;
312 }
313 if (os_read(fd, blob, size) != size) {
314 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000315 return -EIO;
Simon Glass95fac6a2014-02-27 13:25:58 -0700316 }
317 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000318
319done:
320 gd->fdt_blob = blob;
321
322 return 0;
323}
324#endif
325
Simon Glassa733b062013-04-26 02:53:43 +0000326#ifdef CONFIG_SANDBOX
327static int setup_ram_buf(void)
328{
Simon Glass5c2859c2013-11-10 10:27:03 -0700329 struct sandbox_state *state = state_get_current();
330
331 gd->arch.ram_buf = state->ram_buf;
332 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000333
334 return 0;
335}
336#endif
337
Simon Glass1938f4a2013-03-11 06:49:53 +0000338static int setup_fdt(void)
339{
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900340#ifdef CONFIG_OF_CONTROL
341# ifdef CONFIG_OF_EMBED
Simon Glass1938f4a2013-03-11 06:49:53 +0000342 /* Get a pointer to the FDT */
Masahiro Yamada6ab6b2a2014-02-05 11:28:25 +0900343 gd->fdt_blob = __dtb_dt_begin;
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900344# elif defined CONFIG_OF_SEPARATE
Simon Glass1938f4a2013-03-11 06:49:53 +0000345 /* FDT is at end of image */
Simon Glass632efa72013-03-11 07:06:48 +0000346 gd->fdt_blob = (ulong *)&_end;
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900347# elif defined(CONFIG_OF_HOSTFILE)
Simon Glassf828bf22013-04-20 08:42:41 +0000348 if (read_fdt_from_file()) {
349 puts("Failed to read control FDT\n");
350 return -1;
351 }
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900352# endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000353 /* Allow the early environment to override the fdt address */
354 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
355 (uintptr_t)gd->fdt_blob);
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900356#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000357 return 0;
358}
359
360/* Get the top of usable RAM */
361__weak ulong board_get_usable_ram_top(ulong total_size)
362{
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700363#ifdef CONFIG_SYS_SDRAM_BASE
364 /*
365 * Detect whether we have so much RAM it goes past the end of our
366 * 32-bit address space. If so, clip the usable RAM so it doesn't.
367 */
368 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
369 /*
370 * Will wrap back to top of 32-bit space when reservations
371 * are made.
372 */
373 return 0;
374#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000375 return gd->ram_top;
376}
377
378static int setup_dest_addr(void)
379{
380 debug("Monitor len: %08lX\n", gd->mon_len);
381 /*
382 * Ram is setup, size stored in gd !!
383 */
384 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
385#if defined(CONFIG_SYS_MEM_TOP_HIDE)
386 /*
387 * Subtract specified amount of memory to hide so that it won't
388 * get "touched" at all by U-Boot. By fixing up gd->ram_size
389 * the Linux kernel should now get passed the now "corrected"
390 * memory size and won't touch it either. This should work
391 * for arch/ppc and arch/powerpc. Only Linux board ports in
392 * arch/powerpc with bootwrapper support, that recalculate the
393 * memory size from the SDRAM controller setup will have to
394 * get fixed.
395 */
396 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
397#endif
398#ifdef CONFIG_SYS_SDRAM_BASE
399 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
400#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000401 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000402 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000403 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000404 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700405#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000406 /*
407 * We need to make sure the location we intend to put secondary core
408 * boot code is reserved and not used by any part of u-boot
409 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000410 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
411 gd->relocaddr = determine_mp_bootpg(NULL);
412 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000413 }
414#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000415 return 0;
416}
417
418#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
419static int reserve_logbuffer(void)
420{
421 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000422 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000423 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000424 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000425 return 0;
426}
427#endif
428
429#ifdef CONFIG_PRAM
430/* reserve protected RAM */
431static int reserve_pram(void)
432{
433 ulong reg;
434
435 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000436 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000437 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000438 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000439 return 0;
440}
441#endif /* CONFIG_PRAM */
442
443/* Round memory pointer down to next 4 kB limit */
444static int reserve_round_4k(void)
445{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000446 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000447 return 0;
448}
449
450#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
451 defined(CONFIG_ARM)
452static int reserve_mmu(void)
453{
454 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800455 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000456 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000457
458 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000459 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000460
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000461 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000462 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
463 gd->arch.tlb_addr + gd->arch.tlb_size);
464 return 0;
465}
466#endif
467
468#ifdef CONFIG_LCD
469static int reserve_lcd(void)
470{
471#ifdef CONFIG_FB_ADDR
472 gd->fb_base = CONFIG_FB_ADDR;
473#else
474 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000475 gd->relocaddr = lcd_setmem(gd->relocaddr);
476 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000477#endif /* CONFIG_FB_ADDR */
478 return 0;
479}
480#endif /* CONFIG_LCD */
481
Simon Glass71c52db2013-06-11 11:14:42 -0700482static int reserve_trace(void)
483{
484#ifdef CONFIG_TRACE
485 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
486 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
487 debug("Reserving %dk for trace data at: %08lx\n",
488 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
489#endif
490
491 return 0;
492}
493
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800494#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
495 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
496 !defined(CONFIG_BLACKFIN)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000497static int reserve_video(void)
498{
499 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000500 gd->relocaddr = video_setmem(gd->relocaddr);
501 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000502
503 return 0;
504}
505#endif
506
Simon Glass1938f4a2013-03-11 06:49:53 +0000507static int reserve_uboot(void)
508{
509 /*
510 * reserve memory for U-Boot code, data & bss
511 * round down to next 4 kB limit
512 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000513 gd->relocaddr -= gd->mon_len;
514 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000515#ifdef CONFIG_E500
516 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000517 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000518#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000519
520 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000521 gd->relocaddr);
522
523 gd->start_addr_sp = gd->relocaddr;
524
Simon Glass1938f4a2013-03-11 06:49:53 +0000525 return 0;
526}
527
Simon Glass8cae8a62013-03-05 14:39:45 +0000528#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000529/* reserve memory for malloc() area */
530static int reserve_malloc(void)
531{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000532 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000533 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000534 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000535 return 0;
536}
537
538/* (permanently) allocate a Board Info struct */
539static int reserve_board(void)
540{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800541 if (!gd->bd) {
542 gd->start_addr_sp -= sizeof(bd_t);
543 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
544 memset(gd->bd, '\0', sizeof(bd_t));
545 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
546 sizeof(bd_t), gd->start_addr_sp);
547 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000548 return 0;
549}
Simon Glass8cae8a62013-03-05 14:39:45 +0000550#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000551
552static int setup_machine(void)
553{
554#ifdef CONFIG_MACH_TYPE
555 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
556#endif
557 return 0;
558}
559
560static int reserve_global_data(void)
561{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000562 gd->start_addr_sp -= sizeof(gd_t);
563 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000564 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000565 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000566 return 0;
567}
568
569static int reserve_fdt(void)
570{
571 /*
572 * If the device tree is sitting immediate above our image then we
573 * must relocate it. If it is embedded in the data section, then it
574 * will be relocated with other data.
575 */
576 if (gd->fdt_blob) {
577 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
578
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000579 gd->start_addr_sp -= gd->fdt_size;
580 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000581 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000582 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000583 }
584
585 return 0;
586}
587
Andreas Bießmann68145d42015-02-06 23:06:45 +0100588int arch_reserve_stacks(void)
589{
590 return 0;
591}
592
Simon Glass1938f4a2013-03-11 06:49:53 +0000593static int reserve_stacks(void)
594{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100595 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000596 gd->start_addr_sp -= 16;
597 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000598
599 /*
Andreas Bießmann68145d42015-02-06 23:06:45 +0100600 * let the architecture specific code tailor gd->start_addr_sp and
601 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000602 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100603 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000604}
605
606static int display_new_sp(void)
607{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000608 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000609
610 return 0;
611}
612
angelo@sysam.ite310b932015-02-12 01:40:17 +0100613#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000614static int setup_board_part1(void)
615{
616 bd_t *bd = gd->bd;
617
618 /*
619 * Save local variables to board info struct
620 */
621
622 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
623 bd->bi_memsize = gd->ram_size; /* size in bytes */
624
625#ifdef CONFIG_SYS_SRAM_BASE
626 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
627 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
628#endif
629
Masahiro Yamada58dac322014-03-05 17:40:10 +0900630#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000631 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
632 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
633#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100634#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000635 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
636#endif
637#if defined(CONFIG_MPC83xx)
638 bd->bi_immrbar = CONFIG_SYS_IMMR;
639#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000640
641 return 0;
642}
643
644static int setup_board_part2(void)
645{
646 bd_t *bd = gd->bd;
647
648 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
649 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
650#if defined(CONFIG_CPM2)
651 bd->bi_cpmfreq = gd->arch.cpm_clk;
652 bd->bi_brgfreq = gd->arch.brg_clk;
653 bd->bi_sccfreq = gd->arch.scc_clk;
654 bd->bi_vco = gd->arch.vco_out;
655#endif /* CONFIG_CPM2 */
656#if defined(CONFIG_MPC512X)
657 bd->bi_ipsfreq = gd->arch.ips_clk;
658#endif /* CONFIG_MPC512X */
659#if defined(CONFIG_MPC5xxx)
660 bd->bi_ipbfreq = gd->arch.ipb_clk;
661 bd->bi_pcifreq = gd->pci_clk;
662#endif /* CONFIG_MPC5xxx */
Alison Wang1313db42015-02-12 18:33:15 +0800663#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
664 bd->bi_pcifreq = gd->pci_clk;
665#endif
666#if defined(CONFIG_EXTRA_CLOCK)
667 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
668 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
669 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
670#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000671
672 return 0;
673}
674#endif
675
676#ifdef CONFIG_SYS_EXTBDINFO
677static int setup_board_extra(void)
678{
679 bd_t *bd = gd->bd;
680
681 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
682 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
683 sizeof(bd->bi_r_version));
684
685 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
686 bd->bi_plb_busfreq = gd->bus_clk;
687#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
688 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
689 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
690 bd->bi_pci_busfreq = get_PCI_freq();
691 bd->bi_opbfreq = get_OPB_freq();
692#elif defined(CONFIG_XILINX_405)
693 bd->bi_pci_busfreq = get_PCI_freq();
694#endif
695
696 return 0;
697}
698#endif
699
Simon Glass1938f4a2013-03-11 06:49:53 +0000700#ifdef CONFIG_POST
701static int init_post(void)
702{
703 post_bootmode_init();
704 post_run(NULL, POST_ROM | post_bootmode_get(0));
705
706 return 0;
707}
708#endif
709
Simon Glass1938f4a2013-03-11 06:49:53 +0000710static int setup_dram_config(void)
711{
712 /* Ram is board specific, so move it to board code ... */
713 dram_init_banksize();
714
715 return 0;
716}
717
718static int reloc_fdt(void)
719{
720 if (gd->new_fdt) {
721 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
722 gd->fdt_blob = gd->new_fdt;
723 }
724
725 return 0;
726}
727
728static int setup_reloc(void)
729{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800730#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000731 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100732#ifdef CONFIG_M68K
733 /*
734 * On all ColdFire arch cpu, monitor code starts always
735 * just after the default vector table location, so at 0x400
736 */
737 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
738#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800739#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000740 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
741
742 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000743 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000744 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
745 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000746
747 return 0;
748}
749
750/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700751#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000752
753static int jump_to_copy(void)
754{
Simon Glass48a33802013-03-05 14:39:52 +0000755 /*
756 * x86 is special, but in a nice way. It uses a trampoline which
757 * enables the dcache if possible.
758 *
759 * For now, other archs use relocate_code(), which is implemented
760 * similarly for all archs. When we do generic relocation, hopefully
761 * we can make all archs enable the dcache prior to relocation.
762 */
763#ifdef CONFIG_X86
764 /*
765 * SDRAM and console are now initialised. The final stack can now
766 * be setup in SDRAM. Code execution will continue in Flash, but
767 * with the stack in SDRAM and Global Data in temporary memory
768 * (CPU cache)
769 */
770 board_init_f_r_trampoline(gd->start_addr_sp);
771#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000772 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000773#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000774
775 return 0;
776}
777#endif
778
779/* Record the board_init_f() bootstage (after arch_cpu_init()) */
780static int mark_bootstage(void)
781{
782 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
783
784 return 0;
785}
786
Simon Glassd59476b2014-07-10 22:23:28 -0600787static int initf_malloc(void)
788{
789#ifdef CONFIG_SYS_MALLOC_F_LEN
790 assert(gd->malloc_base); /* Set up by crt0.S */
791 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
792 gd->malloc_ptr = 0;
793#endif
794
795 return 0;
796}
797
Simon Glassab7cd622014-07-23 06:55:04 -0600798static int initf_dm(void)
799{
800#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
801 int ret;
802
803 ret = dm_init_and_scan(true);
804 if (ret)
805 return ret;
806#endif
807
808 return 0;
809}
810
Simon Glass146251f2015-01-19 22:16:12 -0700811/* Architecture-specific memory reservation */
812__weak int reserve_arch(void)
813{
814 return 0;
815}
816
Simon Glass1938f4a2013-03-11 06:49:53 +0000817static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000818#ifdef CONFIG_SANDBOX
819 setup_ram_buf,
820#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000821 setup_mon_len,
Simon Glass71c52db2013-06-11 11:14:42 -0700822 setup_fdt,
Kevin Hilmand2107182014-12-09 15:03:58 -0800823#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700824 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800825#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700826 initf_malloc,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000827#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
828 /* TODO: can this go into arch_cpu_init()? */
829 probecpu,
830#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000831 arch_cpu_init, /* basic arch cpu dependent setup */
832 mark_bootstage,
833#ifdef CONFIG_OF_CONTROL
834 fdtdec_check_fdt,
835#endif
Simon Glass3ea09532014-09-03 17:36:59 -0600836 initf_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000837#if defined(CONFIG_BOARD_EARLY_INIT_F)
838 board_early_init_f,
839#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000840 /* TODO: can any of this go into arch_cpu_init()? */
841#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
842 get_clocks, /* get CPU and bus clocks (etc.) */
843#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
844 && !defined(CONFIG_TQM885D)
845 adjust_sdram_tbs_8xx,
846#endif
847 /* TODO: can we rename this to timer_init()? */
848 init_timebase,
849#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800850#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
Simon Glass1938f4a2013-03-11 06:49:53 +0000851 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000852#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000853#ifdef CONFIG_SYS_ALLOC_DPRAM
854#if !defined(CONFIG_CPM2)
855 dpram_init,
856#endif
857#endif
858#if defined(CONFIG_BOARD_POSTCLK_INIT)
859 board_postclk_init,
860#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000861#ifdef CONFIG_FSL_ESDHC
862 get_clocks,
863#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100864#ifdef CONFIG_M68K
865 get_clocks,
866#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000867 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000868#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
869 /* get CPU and bus clocks according to the environment variable */
870 get_clocks_866,
871 /* adjust sdram refresh rate according to the new clock */
872 sdram_adjust_866,
873 init_timebase,
874#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000875 init_baud_rate, /* initialze baudrate settings */
876 serial_init, /* serial communications setup */
877 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000878#ifdef CONFIG_SANDBOX
879 sandbox_early_getopt_check,
880#endif
881#ifdef CONFIG_OF_CONTROL
882 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000883#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000884 display_options, /* say that we are here */
885 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900886#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000887 prt_8260_rsr,
888 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900889#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000890#if defined(CONFIG_MPC83xx)
891 prt_83xx_rsr,
892#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100893#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000894 checkcpu,
895#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000896 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000897#if defined(CONFIG_MPC5xxx)
898 prt_mpc5xxx_clks,
899#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000900#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900901 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000902#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000903 INIT_FUNC_WATCHDOG_INIT
904#if defined(CONFIG_MISC_INIT_F)
905 misc_init_f,
906#endif
907 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100908#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000909 init_func_i2c,
910#endif
911#if defined(CONFIG_HARD_SPI)
912 init_func_spi,
913#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000914 announce_dram_init,
915 /* TODO: unify all these dram functions? */
Andreas Bießmanna752a8b2015-02-06 23:06:48 +0100916#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
Simon Glass1938f4a2013-03-11 06:49:53 +0000917 dram_init, /* configure available RAM banks */
918#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100919#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000920 init_func_ram,
921#endif
922#ifdef CONFIG_POST
923 post_init_f,
924#endif
925 INIT_FUNC_WATCHDOG_RESET
926#if defined(CONFIG_SYS_DRAM_TEST)
927 testdram,
928#endif /* CONFIG_SYS_DRAM_TEST */
929 INIT_FUNC_WATCHDOG_RESET
930
Simon Glass1938f4a2013-03-11 06:49:53 +0000931#ifdef CONFIG_POST
932 init_post,
933#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000934 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000935 /*
936 * Now that we have DRAM mapped and working, we can
937 * relocate the code and continue running from DRAM.
938 *
939 * Reserve memory at end of RAM for (top down in that order):
940 * - area that won't get touched by U-Boot and Linux (optional)
941 * - kernel log buffer
942 * - protected RAM
943 * - LCD framebuffer
944 * - monitor code
945 * - board info struct
946 */
947 setup_dest_addr,
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800948#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800949 /* Blackfin u-boot monitor should be on top of the ram */
950 reserve_uboot,
951#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000952#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
953 reserve_logbuffer,
954#endif
955#ifdef CONFIG_PRAM
956 reserve_pram,
957#endif
958 reserve_round_4k,
959#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
960 defined(CONFIG_ARM)
961 reserve_mmu,
962#endif
963#ifdef CONFIG_LCD
964 reserve_lcd,
965#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700966 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000967 /* TODO: Why the dependency on CONFIG_8xx? */
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800968#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
969 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
970 !defined(CONFIG_BLACKFIN)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000971 reserve_video,
972#endif
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800973#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
Simon Glass1938f4a2013-03-11 06:49:53 +0000974 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800975#endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000976#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000977 reserve_malloc,
978 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000979#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000980 setup_machine,
981 reserve_global_data,
982 reserve_fdt,
Simon Glass146251f2015-01-19 22:16:12 -0700983 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000984 reserve_stacks,
985 setup_dram_config,
986 show_dram_config,
angelo@sysam.ite310b932015-02-12 01:40:17 +0100987#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000988 setup_board_part1,
989 INIT_FUNC_WATCHDOG_RESET
990 setup_board_part2,
991#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000992 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000993#ifdef CONFIG_SYS_EXTBDINFO
994 setup_board_extra,
995#endif
996 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000997 reloc_fdt,
998 setup_reloc,
Simon Glass313aef32015-01-01 16:18:09 -0700999#ifdef CONFIG_X86
1000 copy_uboot_to_ram,
1001 clear_bss,
1002 do_elf_reloc_fixups,
1003#endif
Simon Glass808434c2013-11-10 10:26:59 -07001004#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +00001005 jump_to_copy,
1006#endif
1007 NULL,
1008};
1009
1010void board_init_f(ulong boot_flags)
1011{
York Sun2a1680e2014-05-02 17:28:04 -07001012#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1013 /*
1014 * For some archtectures, global data is initialized and used before
1015 * calling this function. The data should be preserved. For others,
1016 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1017 * here to host global data until relocation.
1018 */
Simon Glass1938f4a2013-03-11 06:49:53 +00001019 gd_t data;
1020
1021 gd = &data;
1022
David Fengcce6be72013-12-14 11:47:36 +08001023 /*
1024 * Clear global data before it is accessed at debug print
1025 * in initcall_run_list. Otherwise the debug print probably
1026 * get the wrong vaule of gd->have_console.
1027 */
David Fengcce6be72013-12-14 11:47:36 +08001028 zero_global_data();
1029#endif
1030
Simon Glass1938f4a2013-03-11 06:49:53 +00001031 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +04001032 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +00001033
1034 if (initcall_run_list(init_sequence_f))
1035 hang();
1036
Simon Glass808434c2013-11-10 10:26:59 -07001037#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +00001038 /* NOTREACHED - jump_to_copy() does not return */
1039 hang();
1040#endif
1041}
1042
Simon Glass48a33802013-03-05 14:39:52 +00001043#ifdef CONFIG_X86
1044/*
1045 * For now this code is only used on x86.
1046 *
1047 * init_sequence_f_r is the list of init functions which are run when
1048 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1049 * The following limitations must be considered when implementing an
1050 * '_f_r' function:
1051 * - 'static' variables are read-only
1052 * - Global Data (gd->xxx) is read/write
1053 *
1054 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1055 * supported). It _should_, if possible, copy global data to RAM and
1056 * initialise the CPU caches (to speed up the relocation process)
1057 *
1058 * NOTE: At present only x86 uses this route, but it is intended that
1059 * all archs will move to this when generic relocation is implemented.
1060 */
1061static init_fnc_t init_sequence_f_r[] = {
1062 init_cache_f_r,
Simon Glass48a33802013-03-05 14:39:52 +00001063
1064 NULL,
1065};
1066
1067void board_init_f_r(void)
1068{
1069 if (initcall_run_list(init_sequence_f_r))
1070 hang();
1071
1072 /*
1073 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1074 * Transfer execution from Flash to RAM by calculating the address
1075 * of the in-RAM copy of board_init_r() and calling it
1076 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001077 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001078
1079 /* NOTREACHED - board_init_r() does not return */
1080 hang();
1081}
Simon Glass74d01862015-02-07 11:51:34 -07001082#else
1083ulong board_init_f_mem(ulong top)
1084{
1085 /* Leave space for the stack we are running with now */
1086 top -= 0x40;
1087
1088 top -= sizeof(struct global_data);
1089 top = ALIGN(top, 16);
1090 gd = (struct global_data *)top;
1091 memset((void *)gd, '\0', sizeof(*gd));
1092
1093#ifdef CONFIG_SYS_MALLOC_F_LEN
1094 top -= CONFIG_SYS_MALLOC_F_LEN;
1095 gd->malloc_base = top;
1096#endif
1097
1098 return top;
1099}
Simon Glass48a33802013-03-05 14:39:52 +00001100#endif /* CONFIG_X86 */