blob: 96969b9e30eca5dbc95ef566519354182baf8858 [file] [log] [blame]
Masahiro Yamada81385812016-01-12 16:36:38 +09001menu "Clock"
2
Simon Glassf26c8a82015-06-23 15:39:15 -06003config CLK
4 bool "Enable clock driver support"
5 depends on DM
6 help
7 This allows drivers to be provided for clock generators, including
8 oscillators and PLLs. Devices can use a common clock API to request
9 a particular clock rate and check on available clocks. Clocks can
10 feed into other clocks in a tree structure, with multiplexers to
11 choose the source for each clock.
12
Masahiro Yamada05435892015-08-12 07:31:46 +090013config SPL_CLK
Simon Glassf26c8a82015-06-23 15:39:15 -060014 bool "Enable clock support in SPL"
Wenyou Yang0712b672017-07-31 15:21:57 +080015 depends on CLK && SPL && SPL_DM
Simon Glassf26c8a82015-06-23 15:39:15 -060016 help
17 The clock subsystem adds a small amount of overhead to the image.
18 If this is acceptable and you have a need to use clock drivers in
19 SPL, enable this option. It might provide a cleaner interface to
20 setting up clocks within SPL, and allows the same drivers to be
21 used as U-Boot proper.
Masahiro Yamada81385812016-01-12 16:36:38 +090022
Philipp Tomsich7c819e72017-06-29 01:45:01 +020023config TPL_CLK
24 bool "Enable clock support in TPL"
25 depends on CLK && TPL_DM
26 help
27 The clock subsystem adds a small amount of overhead to the image.
28 If this is acceptable and you have a need to use clock drivers in
29 SPL, enable this option. It might provide a cleaner interface to
30 setting up clocks within TPL, and allows the same drivers to be
31 used as U-Boot proper.
32
Álvaro Fernández Rojas5357eb92017-05-07 20:13:01 +020033config CLK_BCM6345
34 bool "Clock controller driver for BCM6345"
35 depends on CLK && ARCH_BMIPS
36 default y
37 help
38 This clock driver adds support for enabling and disabling peripheral
39 clocks on BCM6345 SoCs. HW has no rate changing capabilities.
40
Paul Burtondd7c7492016-09-08 07:47:38 +010041config CLK_BOSTON
42 def_bool y if TARGET_BOSTON
43 depends on CLK
44 select REGMAP
45 select SYSCON
46 help
47 Enable this to support the clocks
48
Patrice Chotardf264e232017-11-15 13:14:48 +010049config CLK_STM32F
50 bool "Enable clock driver support for STM32F family"
51 depends on CLK && (STM32F7 || STM32F4)
52 default y
53 help
54 This clock driver adds support for RCC clock management
55 for STM32F4 and STM32F7 SoCs.
56
Andreas Dannenberge585bef2018-08-27 15:57:43 +053057config CLK_TI_SCI
58 bool "TI System Control Interface (TI SCI) clock driver"
59 depends on CLK && TI_SCI_PROTOCOL && OF_CONTROL
60 help
61 This enables the clock driver support over TI System Control Interface
62 available on some new TI's SoCs. If you wish to use clock resources
63 managed by the TI System Controller, say Y here. Otherwise, say N.
64
Eugeniy Paltseve80dac02017-12-10 21:20:08 +030065config CLK_HSDK
66 bool "Enable cgu clock driver for HSDK"
67 depends on CLK
68 help
69 Enable this to support the cgu clocks on Synopsys ARC HSDK
70
Liviu Dudaua71e9072018-09-17 17:50:00 +010071config CLK_VEXPRESS_OSC
72 bool "Enable driver for Arm Versatile Express OSC clock generators"
73 depends on CLK && VEXPRESS_CONFIG
74 help
75 This clock driver adds support for clock generators present on
76 Arm Versatile Express platforms.
77
Stefan Herbrechtsmeier3a64b252017-01-17 16:27:29 +010078config CLK_ZYNQ
79 bool "Enable clock driver support for Zynq"
80 depends on CLK && ARCH_ZYNQ
81 default y
82 help
83 This clock driver adds support for clock realted settings for
84 Zynq platform.
85
Siva Durga Prasad Paladugu128ec1f2016-11-15 16:15:41 +053086config CLK_ZYNQMP
87 bool "Enable clock driver support for ZynqMP"
88 depends on ARCH_ZYNQMP
89 help
90 This clock driver adds support for clock realted settings for
91 ZynqMP platform.
92
Patrick Delaunaya6151912018-03-12 10:46:15 +010093config CLK_STM32MP1
94 bool "Enable RCC clock driver for STM32MP1"
95 depends on ARCH_STM32MP && CLK
96 default y
97 help
98 Enable the STM32 clock (RCC) driver. Enable support for
99 manipulating STM32MP1's on-SoC clocks.
100
Wenyou Yang9e5935c2016-07-20 17:55:12 +0800101source "drivers/clk/at91/Kconfig"
Jagan Tekicf682252018-07-30 18:26:18 +0530102source "drivers/clk/exynos/Kconfig"
Peng Fanf77d4412018-10-18 14:28:30 +0200103source "drivers/clk/imx/Kconfig"
Jerome Brunetf5abfed2019-02-10 14:54:30 +0100104source "drivers/clk/meson/Kconfig"
Marek Behún82a248d2018-04-24 17:21:25 +0200105source "drivers/clk/mvebu/Kconfig"
Manivannan Sadhasivamae485b52018-06-14 23:38:35 +0530106source "drivers/clk/owl/Kconfig"
Jagan Tekicf682252018-07-30 18:26:18 +0530107source "drivers/clk/renesas/Kconfig"
Jagan Teki0d47bc72018-12-22 21:32:49 +0530108source "drivers/clk/sunxi/Kconfig"
Anup Patelc40b6df2019-02-25 08:14:49 +0000109source "drivers/clk/sifive/Kconfig"
Jagan Tekicf682252018-07-30 18:26:18 +0530110source "drivers/clk/tegra/Kconfig"
111source "drivers/clk/uniphier/Kconfig"
Masahiro Yamada48264d92016-02-02 21:11:32 +0900112
Mario Sixf0bcbe62018-04-27 14:53:15 +0200113config ICS8N3QV01
114 bool "Enable ICS8N3QV01 VCXO driver"
115 depends on CLK
116 help
117 Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
118 Crystal Oscillator). The output frequency can be programmed via an
119 I2C interface.
120
Mario Six07d538d2018-08-06 10:23:36 +0200121config CLK_MPC83XX
122 bool "Enable MPC83xx clock driver"
123 depends on CLK
124 help
125 Support for the clock driver of the MPC83xx series of SoCs.
126
Masahiro Yamada81385812016-01-12 16:36:38 +0900127endmenu