blob: 2470855463fda3586a28a1968d9d58372fc856d3 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +00002/*
3 * Copyright (C) 2013 Stefan Roese <sr@denx.de>
4 *
5 * Configuration settings for the ProjectionDesign / Barco
6 * Titanium board.
7 *
8 * Based on mx6qsabrelite.h which is:
9 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000010 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
Eric Nelson02824dc2013-11-26 17:40:30 -070015#include "mx6_common.h"
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000016
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000017#define CONFIG_MX6Q
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000018
Tom Rinicd7b6342017-01-25 20:42:38 -050019/* Provide the MACH_TYPE value that the vendor kernel requires. */
20#define CONFIG_MACH_TYPE 3769
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000021
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000022/* Size of malloc() pool */
23#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
24
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000025#define CONFIG_MISC_INIT_R
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000026
27#define CONFIG_MXC_UART
28#define CONFIG_MXC_UART_BASE UART1_BASE
29
30/* I2C Configs */
tremb089d032013-09-21 18:13:36 +020031#define CONFIG_SYS_I2C
32#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020033#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
34#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070035#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000036#define CONFIG_SYS_I2C_SPEED 100000
37
38/* MMC Configs */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000039#define CONFIG_SYS_FSL_ESDHC_ADDR 0
40#define CONFIG_SYS_FSL_USDHC_NUM 1
41
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000042#define CONFIG_FEC_MXC
43#define CONFIG_MII
44#define IMX_FEC_BASE ENET_BASE_ADDR
45#define CONFIG_FEC_XCV_TYPE RGMII
46#define CONFIG_FEC_MXC_PHYADDR 4
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000047
48/* USB Configs */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000049#define CONFIG_MXC_USB_PORT 1
50#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
51#define CONFIG_MXC_USB_FLAGS 0
52
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000053#define CONFIG_SYS_MEMTEST_START 0x10000000
54#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20))
55
Mario Six5bc05432018-03-28 14:38:20 +020056#define CONFIG_HOSTNAME "titanium"
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000057#define CONFIG_UBI_PART ubi
58#define CONFIG_UBIFS_VOLUME rootfs0
59
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000060#define CONFIG_EXTRA_ENV_SETTINGS \
Mario Six5bc05432018-03-28 14:38:20 +020061 "kernel=" CONFIG_HOSTNAME "/uImage\0" \
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000062 "kernel_fs=/boot/uImage\0" \
63 "kernel_addr=11000000\0" \
Mario Six5bc05432018-03-28 14:38:20 +020064 "dtb=" CONFIG_HOSTNAME "/" \
65 CONFIG_HOSTNAME ".dtb\0" \
66 "dtb_fs=/boot/" CONFIG_HOSTNAME ".dtb\0" \
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000067 "dtb_addr=12800000\0" \
68 "script=boot.scr\0" \
69 "uimage=uImage\0" \
70 "console=ttymxc0\0" \
71 "baudrate=115200\0" \
72 "fdt_high=0xffffffff\0" \
73 "initrd_high=0xffffffff\0" \
74 "mmcdev=0\0" \
75 "mmcpart=1\0" \
76 "uimage=uImage\0" \
77 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
78 " ${script}\0" \
79 "bootscript=echo Running bootscript from mmc ...; source\0" \
80 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
81 "mmcroot=/dev/mmcblk0p2\0" \
82 "mmcargs=setenv bootargs console=${console},${baudrate} " \
83 "root=${mmcroot} rootwait rw\0" \
84 "bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
85 " ${uimage}; bootm\0" \
86 "addip=setenv bootargs ${bootargs} " \
87 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
88 ":${hostname}:${netdev}:off panic=1\0" \
89 "addcon=setenv bootargs ${bootargs} console=ttymxc0," \
90 "${baudrate}\0" \
91 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
92 "rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \
93 "nfsargs=setenv bootargs root=/dev/nfs rw " \
94 "nfsroot=${serverip}:${rootpath}\0" \
Mario Six5bc05432018-03-28 14:38:20 +020095 "ubifs=" CONFIG_HOSTNAME "/ubifs.img\0" \
Stefan Roeseb29ca4a2013-04-17 00:32:43 +000096 "part=" __stringify(CONFIG_UBI_PART) "\0" \
97 "boot_vol=0\0" \
98 "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \
99 "load_ubifs=tftp ${kernel_addr} ${ubifs}\0" \
100 "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
101 " ${filesize}\0" \
102 "upd_ubifs=run load_ubifs update_ubifs\0" \
103 "init_ubi=nand erase.part ubi;ubi part ${part};" \
104 "ubi create ${vol} c800000\0" \
Tom Rini43ede0b2017-10-22 17:55:07 -0400105 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
106 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000107 "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \
108 " addcon addmtd;" \
109 "bootm ${kernel_addr} - ${dtb_addr}\0" \
110 "ubifsargs=set bootargs ubi.mtd=ubi " \
111 "root=ubi:rootfs${boot_vol} rootfstype=ubifs\0" \
112 "ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0" \
113 "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};" \
114 "ubifsload ${dtb_addr} ${dtb_fs};\0" \
115 "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
116 "addmtd;bootm ${kernel_addr} - ${dtb_addr}\0" \
117 "load_kernel=tftp ${kernel_addr} ${kernel}\0" \
118 "load_dtb=tftp ${dtb_addr} ${dtb}\0" \
119 "net_nfs=run load_dtb load_kernel; " \
120 "run nfsargs addip addcon addmtd;" \
121 "bootm ${kernel_addr} - ${dtb_addr}\0" \
122 "delenv=env default -a -f; saveenv; reset\0"
123
124#define CONFIG_BOOTCOMMAND "run nand_ubifs"
125
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000126/* Physical Memory Map */
127#define CONFIG_NR_DRAM_BANKS 1
128#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
129#define PHYS_SDRAM_SIZE (512 << 20)
130
131#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
132#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
133#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
134
135#define CONFIG_SYS_INIT_SP_OFFSET \
136 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
137#define CONFIG_SYS_INIT_SP_ADDR \
138 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
139
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000140/* Enable NAND support */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000141#ifdef CONFIG_CMD_NAND
142
143/* NAND stuff */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000144#define CONFIG_SYS_MAX_NAND_DEVICE 1
145#define CONFIG_SYS_NAND_BASE 0x40000000
146#define CONFIG_SYS_NAND_5_ADDR_CYCLE
147#define CONFIG_SYS_NAND_ONFI_DETECTION
148
149/* DMA stuff, needed for GPMI/MXS NAND support */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000150
151/* Environment in NAND */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000152#define CONFIG_ENV_OFFSET (16 << 20)
153#define CONFIG_ENV_SECT_SIZE (128 << 10)
154#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
155#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10))
156#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
157
158#else /* CONFIG_CMD_NAND */
159
160/* Environment in MMC */
161#define CONFIG_ENV_SIZE (8 << 10)
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000162#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
163#define CONFIG_SYS_MMC_ENV_DEV 0
164
165#endif /* CONFIG_CMD_NAND */
166
167/* UBI/UBIFS config options */
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000168#define CONFIG_MTD_DEVICE
169#define CONFIG_MTD_PARTITIONS
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000170
Stefan Roeseb29ca4a2013-04-17 00:32:43 +0000171#endif /* __CONFIG_H */