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Sandeep Paulraj5df65cf2009-10-10 13:37:10 -04001/*
2 * Copyright (C) 2009 Texas Instruments Incorporated
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __CONFIG_H
21#define __CONFIG_H
22
23#define DAVINCI_DM355LEOPARD
24
25#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
Sandeep Paulraj5df65cf2009-10-10 13:37:10 -040026#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
27#define CONFIG_SYS_CONSOLE_INFO_QUIET
28#define CONFIG_DISPLAY_CPUINFO
29
30/* SoC Configuration */
31#define CONFIG_ARM926EJS /* arm926ejs CPU */
32#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
33#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
34#define CONFIG_SYS_HZ 1000
35#define CONFIG_SOC_DM355 /* DM355 based board */
36
37/* Memory Info */
38#define CONFIG_NR_DRAM_BANKS 1
39#define PHYS_SDRAM_1 0x80000000
40#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
41
42/* Serial Driver info: UART0 for console */
43#define CONFIG_SYS_NS16550
44#define CONFIG_SYS_NS16550_SERIAL
45#define CONFIG_SYS_NS16550_REG_SIZE -4
46#define CONFIG_SYS_NS16550_COM1 0x01c20000
47#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
48#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
49#define CONFIG_CONS_INDEX 1
50#define CONFIG_BAUDRATE 115200
51
52/* Ethernet: external DM9000 */
53#define CONFIG_DRIVER_DM9000 1
54#define CONFIG_DM9000_BASE 0x04000000
55#define DM9000_IO CONFIG_DM9000_BASE
56#define DM9000_DATA (CONFIG_DM9000_BASE + 16)
Sandeep Paulraj5df65cf2009-10-10 13:37:10 -040057
58/* I2C */
59#define CONFIG_HARD_I2C
60#define CONFIG_DRIVER_DAVINCI_I2C
61#define CONFIG_SYS_I2C_SPEED 400000
62#define CONFIG_SYS_I2C_SLAVE 0x10
63
64/* NAND */
65#define CONFIG_NAND_DAVINCI
Nick Thompson97f4eb82009-12-12 12:12:26 -050066#define CONFIG_SYS_NAND_CS 2
Sandeep Paulraj5df65cf2009-10-10 13:37:10 -040067#define CONFIG_SYS_NAND_USE_FLASH_BBT
68#define CONFIG_SYS_NAND_HW_ECC
69
70#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
71#define CONFIG_SYS_MAX_NAND_DEVICE 1
72#define CONFIG_SYS_NAND_MAX_CHIPS 1
73
74/* U-Boot command configuration */
75#include <config_cmd_default.h>
76
77#undef CONFIG_CMD_BDI
78#undef CONFIG_CMD_FLASH
79#undef CONFIG_CMD_FPGA
80#undef CONFIG_CMD_SETGETDCR
81
82#define CONFIG_CMD_ASKENV
83#define CONFIG_CMD_DHCP
84#define CONFIG_CMD_I2C
85#define CONFIG_CMD_PING
86#define CONFIG_CMD_SAVES
87
88#ifdef CONFIG_NAND_DAVINCI
89#define CONFIG_CMD_MTDPARTS
90#define CONFIG_MTD_PARTITIONS
91#define CONFIG_MTD_DEVICE
92#define CONFIG_CMD_NAND
93#define CONFIG_CMD_UBI
94#define CONFIG_RBTREE
95#endif
96
97#define CONFIG_CRC32_VERIFY
98#define CONFIG_MX_CYCLIC
99
100/* U-Boot general configuration */
101#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
102#define CONFIG_BOOTFILE "uImage" /* Boot file name */
103#define CONFIG_SYS_PROMPT "DM355 LEOPARD # "
104#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
105#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
106 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
107#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
108#define CONFIG_SYS_HUSH_PARSER
109#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
110#define CONFIG_SYS_LONGHELP
111
112#ifdef CONFIG_NAND_DAVINCI
113#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
114#define CONFIG_ENV_IS_IN_NAND
115#define CONFIG_ENV_OFFSET 0x3C0000
Sandeep Paulraj5df65cf2009-10-10 13:37:10 -0400116#undef CONFIG_ENV_IS_IN_FLASH
117#define CONFIG_ENV_OVERWRITE
118#endif
119
120#define CONFIG_BOOTDELAY 3
121#define CONFIG_BOOTCOMMAND "dhcp;bootm"
122#define CONFIG_BOOTARGS \
123 "console=ttyS0,115200n8 " \
124 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
125
126#define CONFIG_CMDLINE_EDITING
127#define CONFIG_VERSION_VARIABLE
128#define CONFIG_TIMESTAMP
129
130#define CONFIG_NET_RETRY_COUNT 10
131
132/* U-Boot memory configuration */
133#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
134#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
Sandeep Paulraj5df65cf2009-10-10 13:37:10 -0400135#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
136#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
137
138/* Linux interfacing */
139#define CONFIG_CMDLINE_TAG
140#define CONFIG_SETUP_MEMORY_TAGS
141#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
142#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
143
144#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
145
146#ifdef CONFIG_SYS_NAND_LARGEPAGE
147#define PART_BOOT "2m(bootloader)ro,"
148#else
149/* Assume 16K erase blocks; allow a few bad ones. */
150#define PART_BOOT "512k(bootloader)ro,"
151#endif
152
153#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
154#define PART_REST "-(filesystem)"
155
156#define MTDPARTS_DEFAULT \
157 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
158
Sandeep Paulrajb485faa2010-11-27 18:50:11 -0500159#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
160
161#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
162#define CONFIG_SYS_INIT_SP_ADDR \
163 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
164
Sandeep Paulraj5df65cf2009-10-10 13:37:10 -0400165#endif /* __CONFIG_H */