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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 8daf89678e9a8ce4203d2df6c65d9ff17aad785a / . / board / xilinx / microblaze-generic / Kconfig
blob: 98b4814b95a648138bf77e8b555e43162e1dda2f [file] [log] [blame]
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]1if TARGET_MICROBLAZE_GENERIC
2
3config SYS_BOARD
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]4 default "microblaze-generic"
5
6config SYS_VENDOR
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]7 default "xilinx"
8
9config SYS_CONFIG_NAME
Sai Pavan Boddu36458ce2016-08-16 17:12:05 +0530[diff] [blame]10 string "Board configuration name"
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]11 default "microblaze-generic"
Sai Pavan Boddu36458ce2016-08-16 17:12:05 +0530[diff] [blame]12 help
13 This option contains information about board configuration name.
14 Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
15 will be used for board configuration.
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]16
Michal Simekac551e32016-05-24 11:45:11 +0200[diff] [blame]17config XILINX_MICROBLAZE0_USE_MSR_INSTR
18 int "USE_MSR_INSTR range (0:1)"
19 default 0
20
Michal Simek91eeb802016-05-24 11:42:26 +0200[diff] [blame]21config XILINX_MICROBLAZE0_USE_PCMP_INSTR
22 int "USE_PCMP_INSTR range (0:1)"
23 default 0
24
25config XILINX_MICROBLAZE0_USE_BARREL
26 int "USE_BARREL range (0:1)"
27 default 0
28
29config XILINX_MICROBLAZE0_USE_DIV
30 int "USE_DIV range (0:1)"
31 default 0
32
33config XILINX_MICROBLAZE0_USE_HW_MUL
34 int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)"
35 default 0
36
Michal Simek4ad10962016-05-24 13:23:59 +0200[diff] [blame]37config XILINX_MICROBLAZE0_HW_VER
38 string "Core version number"
Michal Simek8a320772018-07-23 08:34:43 +0200[diff] [blame]39 default "7.10.d"
Michal Simek4ad10962016-05-24 13:23:59 +0200[diff] [blame]40
Ovidiu Panait83b175b2021-11-30 18:33:54 +0200[diff] [blame]41config XILINX_MICROBLAZE0_USR_EXCEP
42 bool "MicroBlaze user exception support"
43 default y
44 help
45 Enable this option in order to install the user exception handler
46 (_exception_handler routine from arch/microblaze/cpu/exception.c) in
47 the exception vector table. The user exception vector is located at
48 C_BASE_VECTORS + 0x8 address.
49
Ovidiu Panait1669b3d2022-02-13 10:09:20 +0200[diff] [blame]50config XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP
51 bool "MicroBlaze delay slot exception support"
52 default y
53 help
54 Enable this option if the MicroBlaze processor supports exceptions
55 caused by delay slot instructions (processor version >= v5.00). When
56 enabled, the hw exception handler will print a message indicating
57 whether the exception was triggered by a delay slot instruction.
58
Ovidiu Panaitb6aef102021-11-30 18:33:55 +0200[diff] [blame]59config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
60 hex "Location of MicroBlaze vectors"
61 default 0x0
62 help
63 Memory address location of the exception vector table. It is
64 configurable via the C_BASE_VECTORS hdl parameter.
65
Ovidiu Panaitef0a5922022-05-31 21:14:26 +0300[diff] [blame]66config XILINX_MICROBLAZE0_USE_WDC
67 bool "MicroBlaze wdc instruction support"
68 default y
69 help
70 Enable this option if the MicroBlaze processor is configured with
71 support for the "wdc" (Write to Data Cache) instruction.
72
73config SPL_XILINX_MICROBLAZE0_USE_WDC
74 bool
75 default XILINX_MICROBLAZE0_USE_WDC
76
Ovidiu Panait8daf8962022-05-31 21:14:27 +0300[diff] [blame^]77config XILINX_MICROBLAZE0_USE_WIC
78 bool "MicroBlaze wic instruction support"
79 default y
80 help
81 Enable this option if the MicroBlaze processor is configured with
82 support for the "wic" (Write to Instruction Cache) instruction.
83
84config SPL_XILINX_MICROBLAZE0_USE_WIC
85 bool
86 default XILINX_MICROBLAZE0_USE_WIC
87
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]88endif