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Anatolij Gustschinbed53752008-01-11 14:30:01 +01001/*
2 * (C) Copyright 2007
3 * DENX Software Engineering, Anatolij Gustschin, agust@denx.de
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Anatolij Gustschinbed53752008-01-11 14:30:01 +01006 */
7
8/*
9 * mb862xx.h - Graphic interface for Fujitsu CoralP/Lime
10 */
11
12#ifndef _MB862XX_H_
13#define _MB862XX_H_
14
15#define PCI_VENDOR_ID_FUJITSU 0x10CF
16#define PCI_DEVICE_ID_CORAL_P 0x2019
17#define PCI_DEVICE_ID_CORAL_PA 0x201E
18
Wolfgang Grandeggerc28d3bb2009-10-23 12:03:13 +020019#define MB862XX_TYPE_LIME 0x1
20
Anatolij Gustschincce99b22009-07-07 13:27:07 +020021#define GC_HOST_BASE 0x01fc0000
22#define GC_DISP_BASE 0x01fd0000
23#define GC_DRAW_BASE 0x01ff0000
24
25/* Host interface registers */
26#define GC_SRST 0x0000002c
27#define GC_CCF 0x00000038
Wolfgang Grandeggerc28d3bb2009-10-23 12:03:13 +020028#define GC_CID 0x000000f0
Anatolij Gustschincce99b22009-07-07 13:27:07 +020029#define GC_MMR 0x0000fffc
30
31/*
32 * Display Controller registers
33 * _A means the offset is aligned, we use these for boards
34 * with 8-/16-bit GDC access not working or buggy.
35 */
36#define GC_DCM0 0x00000000
37#define GC_HTP_A 0x00000004
38#define GC_HTP 0x00000006
39#define GC_HDB_HDP_A 0x00000008
40#define GC_HDP 0x00000008
41#define GC_HDB 0x0000000a
42#define GC_VSW_HSW_HSP_A 0x0000000c
43#define GC_HSP 0x0000000c
44#define GC_HSW 0x0000000e
45#define GC_VSW 0x0000000f
46#define GC_VTR_A 0x00000010
47#define GC_VTR 0x00000012
48#define GC_VDP_VSP_A 0x00000014
49#define GC_VSP 0x00000014
50#define GC_VDP 0x00000016
51#define GC_WY_WX 0x00000018
52#define GC_WH_WW 0x0000001c
53#define GC_L0M 0x00000020
54#define GC_L0OA0 0x00000024
55#define GC_L0DA0 0x00000028
56#define GC_L0DY_L0DX 0x0000002c
57#define GC_L2M 0x00000040
58#define GC_L2OA0 0x00000044
59#define GC_L2DA0 0x00000048
60#define GC_L2OA1 0x0000004c
61#define GC_L2DA1 0x00000050
62#define GC_L2DX 0x00000054
63#define GC_L2DY 0x00000056
64#define GC_DCM1 0x00000100
65#define GC_DCM2 0x00000104
66#define GC_DCM3 0x00000108
67#define GC_L0EM 0x00000110
68#define GC_L0WY_L0WX 0x00000114
69#define GC_L0WH_L0WW 0x00000118
70#define GC_L2EM 0x00000130
71#define GC_L2WX 0x00000134
72#define GC_L2WY 0x00000136
73#define GC_L2WW 0x00000138
74#define GC_L2WH 0x0000013a
75#define GC_L0PAL0 0x00000400
76
77/* Drawing registers */
78#define GC_CTR 0x00000400
79#define GC_IFCNT 0x00000408
80#define GC_FBR 0x00000440
81#define GC_XRES 0x00000444
82#define GC_CXMIN 0x00000454
83#define GC_CXMAX 0x00000458
84#define GC_CYMIN 0x0000045c
85#define GC_CYMAX 0x00000460
86#define GC_FC 0x00000480
87#define GC_BC 0x00000484
88#define GC_FIFO 0x000004a0
Wolfgang Grandeggerc28d3bb2009-10-23 12:03:13 +020089#define GC_REV 0x00008084
Anatolij Gustschincce99b22009-07-07 13:27:07 +020090#define GC_GEO_FIFO 0x00008400
91
Anatolij Gustschinbed53752008-01-11 14:30:01 +010092typedef struct {
93 unsigned int index;
94 unsigned int value;
95} gdc_regs;
96
Wolfgang Grandeggerc28d3bb2009-10-23 12:03:13 +020097int mb862xx_probe(unsigned int addr);
Anatolij Gustschinbed53752008-01-11 14:30:01 +010098const gdc_regs *board_get_regs (void);
99unsigned int board_video_init (void);
100void board_backlight_switch(int);
101
102#endif /* _MB862XX_H_ */